MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 81

• Manufacturer Part Number: MPC8572DS
• Description: KIT MPU POWERQUICC III
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8572DS

• Contents: Board
• Data Rate: 10 Mbps to 100 Mbps
• Memory Type: Flash, DDR, DDR2, DDR3, SDRAM
• Interface Type: I2C, Ethernet
• Operating Voltage: 3.3 V
• Data Bus Width: 32 bit
• Product: Development Tools
• Silicon Manufacturer: Freescale
• Core Architecture: Power Architecture
• Core Sub-architecture: PowerQUICC
• Silicon Core Number: MPC85xx
• Silicon Family Name: PowerQUICC III
• Rohs Compliant: Yes
• For Use With/related Products: MPC8572E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The other detailed AC requirements of the SerDes Reference Clocks is defined by each interface protocol
based on application usage. Refer to the following sections for detailed information:
15.2.4.1
SD1_REF_CLK/SD1_REF_CLK are designed to work with a spread spectrum clock (+0 to –0.5%
spreading at 30–33 KHz rate is allowed), assuming both ends have same reference clock. For better results,
a source without significant unintended modulation should be used.
SD2_REF_CLK/SD2_REF_CLK are not to be used with, and should not be clocked by, a spread spectrum
clock source.
15.3
Figure 54
The DC and AC specification of SerDes data lanes are defined in each interface protocol section below
(PCI Express, Serial Rapid IO or SGMII) in this document based on the application usage:
Note that external AC Coupling capacitor is required for the above three serial transmission protocols with
the capacitor value defined in specification of each protocol section.
16 PCI Express
This section describes the DC and AC electrical specifications for the PCI Express bus of the MPC8572E.
Freescale Semiconductor
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•
•
•
•
•
Section 8.3.2, “AC Requirements for SGMII SD2_REF_CLK and SD2_REF_CLK”
Section 16.2, “AC Requirements for PCI Express SerDes Reference
Section 17.2, “AC Requirements for Serial RapidIO SD1_REF_CLK and SD1_REF_CLK”
Section 8.3, “SGMII Interface Electrical
Section 16, “PCI
Section 17, “Serial
SerDes Transmitter and Receiver Reference Circuits
shows the reference circuits for SerDes data lane’s transmitter and receiver.
Spread Spectrum Clock
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Transmitter
Figure 54. SerDes Transmitter and Receiver Reference Circuits
Express”
RapidIO”
50 Ω
50 Ω
SD1_TX n or
SD2_TX n
SD1_TX n or
SD2_TX n
Characteristics”
SD1_RX n or
SD2_RX n
SD1_RX n or
SD2_RX n
50 Ω
50 Ω
Clocks”
Receiver
PCI Express
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