MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 132

• Manufacturer Part Number: MPC8572DS
• Description: KIT MPU POWERQUICC III
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8572DS

• Contents: Board
• Data Rate: 10 Mbps to 100 Mbps
• Memory Type: Flash, DDR, DDR2, DDR3, SDRAM
• Interface Type: I2C, Ethernet
• Operating Voltage: 3.3 V
• Data Bus Width: 32 bit
• Product: Development Tools
• Silicon Manufacturer: Freescale
• Core Architecture: Power Architecture
• Core Sub-architecture: PowerQUICC
• Silicon Core Number: MPC85xx
• Silicon Family Name: PowerQUICC III
• Rohs Compliant: Yes
• For Use With/related Products: MPC8572E
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

System Design Information
21.10 Guidelines for High-Speed Interface Termination
21.10.1 SerDes 1 Interface Entirely Unused
If the high-speed SerDes 1 interface is not used at all, the unused pin should be terminated as described in
this section.
The following pins must be left unconnected (float):
The following pins must be connected to XGND_SRDS1:
Pins K32 and C29 must be tied to XV
through a 300-Ω resistor.
The POR configuration pin cfg_srds1_en on TSEC2_TXD[5] can be used to power down SerDes 1 block
for power saving. Note that both SVDD_SRDS1 and XVDD_SRDS1 must remain powered.
21.10.2 SerDes 1 Interface Partly Unused
If only part of the high speed SerDes 1 interface pins are used, the remaining high-speed serial I/O pins
should be terminated as described in this section.
The following pins must be left unconnected (float) if not used:
The following pins must be connected to XGND_SRDS1 if not used:
Pins K32 and C29 must be tied to XV
through a 300-Ω resistor.
21.10.3 SerDes 2 Interface (SGMII) Entirely Unused
If the high-speed SerDes 2 interface (SGMII) is not used at all, the unused pin should be terminated as
described in this section.
The following pins must be left unconnected (float):
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SD1_TX[7:0]
SD1_TX[7:0]
Reserved pins C24, C25, H26, H27
SD1_RX[7:0]
SD1_RX[7:0]
SD1_REF_CLK
SD1_REF_CLK
SD1_TX[7:0]
SD1_TX[7:0]
Reserved pins: C24, C25, H26, H27
SD1_RX[7:0]
SD1_RX[7:0]
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
DD
DD
_SRDS1. Pins K31 and C30 must be tied to XGND_SRDS1
_SRDS1. Pins K31 and C30 must be tied to XGND_SRDS1
Freescale Semiconductor