MPC8572DS Freescale Semiconductor, MPC8572DS Datasheet - Page 93

KIT MPU POWERQUICC III

MPC8572DS

Manufacturer Part Number
MPC8572DS
Description
KIT MPU POWERQUICC III
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets

Specifications of MPC8572DS

Contents
Board
Data Rate
10 Mbps to 100 Mbps
Memory Type
Flash, DDR, DDR2, DDR3, SDRAM
Interface Type
I2C, Ethernet
Operating Voltage
3.3 V
Data Bus Width
32 bit
Product
Development Tools
Silicon Manufacturer
Freescale
Core Architecture
Power Architecture
Core Sub-architecture
PowerQUICC
Silicon Core Number
MPC85xx
Silicon Family Name
PowerQUICC III
Rohs Compliant
Yes
For Use With/related Products
MPC8572E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For each baud rate at which an LP-Serial transmitter is specified to operate, the output eye pattern of the
transmitter shall fall entirely within the unshaded portion of the transmitter output compliance mask shown
in
the device is driving a 100 Ω +/–5% differential resistive load. The output eye pattern of an LP-Serial
transmitter that implements pre-emphasis (to equalize the link and reduce inter-symbol interference) need
only comply with the Transmitter Output Compliance Mask when pre-emphasis is disabled or minimized.
Freescale Semiconductor
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Output Voltage,
Differential Output Voltage
Deterministic Jitter
Total Jitter
Multiple output skew
Unit Interval
Figure 58
Characteristic
Characteristic
with the parameters specified in
MPC8572E PowerQUICC III Integrated Processor Hardware Specifications, Rev. 5
Table 70. Long Run Transmitter AC Timing Specifications—3.125 GBaud
Table 69. Long Run Transmitter AC Timing Specifications—2.5 GBaud
V
V
J
J
S
UI
V
V
J
J
S
UI
D
T
D
T
O
O
DIFFPP
MO
DIFFPP
MO
Symbol
Symbol
Figure 71
–0.40
800
400
–0.40
800
320
Min
Min
when measured at the output pins of the device and
Range
Range
2.30
1600
0.17
0.35
1000
400
2.30
1600
0.17
0.35
1000
320
Max
Max
Volts
mV p-p
UI p-p
UI p-p
ps
ps
Volts
mV p-p
UI p-p
UI p-p
ps
ps
Unit
Unit
Voltage relative to COMMON of
either signal comprising a
differential pair
Skew at the transmitter output
between lanes of a multilane
link
Voltage relative to COMMON of
either signal comprising a
differential pair
Skew at the transmitter output
between lanes of a multilane
link
+/- 100 ppm
+/- 100 ppm
Notes
Notes
Serial RapidIO
93

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