MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 155

IC MCU 3MHZ 512 EEPROM 52-PLCC

MC68HC11E1CFN3

Manufacturer Part Number
MC68HC11E1CFN3
Description
IC MCU 3MHZ 512 EEPROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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9.4.9 Timer Interrupt Mask 2 Register
M68HC11E Family — Rev. 5
MOTOROLA
NOTE:
Use this 8-bit register to enable or inhibit timer overflow and real-time interrupts.
The timer prescaler control bits are included in this register.
TOI — Timer Overflow Interrupt Enable Bit
RTII — Real-Time Interrupt Enable Bit
PAOVI — Pulse Accumulator Overflow Interrupt Enable Bit
PAII — Pulse Accumulator Input Edge Interrupt Enable Bit
Bits [3:2] — Unimplemented
PR[1:0] — Timer Prescaler Select Bits
Bits in TMSK2 correspond bit for bit with flag bits in TFLG2. Bits in TMSK2 enable
the corresponding interrupt sources.
Refer to
Refer to
Refer to
Always read 0
These bits are used to select the prescaler divide-by ratio. In normal modes,
PR[1:0] can be written only once, and the write must be within 64 cycles after
reset. Refer to
Address:
Reset:
Read:
Write:
0 = TOF interrupts disabled
1 = Interrupt requested when TOF is set to 1
Freescale Semiconductor, Inc.
For More Information On This Product,
9.5 Real-Time Interrupt
9.7.3 Pulse Accumulator Status and Interrupt
9.7.3 Pulse Accumulator Status and Interrupt
$1024
Figure 9-19. Timer Interrupt Mask 2 Register (TMSK2)
Bit 7
TOI
0
Go to: www.freescale.com
Table 9-1
= Unimplemented
RTII
6
0
Timing System
PR[1:0]
Table 9-4. Timer Prescale
and
0 0
0 1
1 0
1 1
PAOVI
5
0
Table 9-4
(RTI).
PAII
4
0
for specific timing values.
Prescaler
3
0
16
1
4
8
2
0
Bits.
Bits.
PR1
Output Compare
1
0
Timing System
Data Sheet
Bit 0
PR0
0
155

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