MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 160

• Manufacturer Part Number: MC68HC11E1CFN3
• Description: IC MCU 3MHZ 512 EEPROM 52-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11E1CFN3

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 3MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 38
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-PLCC
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 3 MHz
• Number Of Programmable I/os: 22
• Number Of Timers: 16 bit
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Timing System
9.7 Pulse Accumulator
Data Sheet
160
MCU PIN
FROM MAIN TIMER
PA7/
PAI/
OC1
E
÷
MAIN TIMER
64 CLOCK
FROM
OC1
DDRA7
FROM
OUTPUT
BUFFER
EDGE DETECTOR
The M68HC11 Family of MCUs has an 8-bit counter that can be configured to
operate either as a simple event counter or for gated time accumulation, depending
on the state of the PAMOD bit in the PACTL register. Refer to the pulse
accumulator block diagram,
counter is clocked to increasing values by an external pin. The maximum clocking
rate for the external event counting mode is the E clock divided by two. In gated
time accumulation mode, a free-running E-clock divide-by-64 signal drives the 8-bit
counter, but only while the external PAI pin is activated. Refer to
pulse accumulator counter can be read or written at any time.
INPUT BUFFER
AND
Freescale Semiconductor, Inc.
For More Information On This Product,
TMSK2 INT ENABLES
PACTL CONTROL
Figure 9-24. Pulse Accumulator
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DATA
BUS
Timing System
MUX
2
:
1
Figure
9-24. In the event counting mode, the 8-bit
CLOCK
PAI EDGE
PAEN
PAEN
INTERNAL
DATA BUS
TFLG2 INTERRUPT STATUS
ENABLE
OVERFLOW
PACNT 8-BIT COUNTER
PAOVI
PAOVF
PAII
PAIF
M68HC11E Family — Rev. 5
DISABLE
FLAG SETTING
Table
INTERRUPT
REQUESTS
MOTOROLA
9-6. The
1
2