MC68HC11E1CFN3 Freescale Semiconductor, MC68HC11E1CFN3 Datasheet - Page 67

IC MCU 3MHZ 512 EEPROM 52-PLCC

MC68HC11E1CFN3

Manufacturer Part Number
MC68HC11E1CFN3
Description
IC MCU 3MHZ 512 EEPROM 52-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheet

Specifications of MC68HC11E1CFN3

Core Processor
HC11
Core Size
8-Bit
Speed
3MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
38
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-PLCC
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
3 MHz
Number Of Programmable I/os
22
Number Of Timers
16 bit
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-
Lead Free Status / Rohs Status
 Details

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3.4 Conversion Process
3.5 Channel Assignments
M68HC11E Family — Rev. 5
MOTOROLA
ADPU — A/D Power-Up Bit
CSEL — Clock Select Bit
IRQE — Configure IRQ for Edge-Sensitive Only Operation
DLY — Enable Oscillator Startup Delay Bit
CME — Clock Monitor Enable Bit
Bit 2 — Not implemented
CR[1:0] — COP Timer Rate Select Bits
The A/D conversion sequence begins one E-clock cycle after a write to the A/D
control/status register, ADCTL. The bits in ADCTL select the channel and the mode
of conversion.
An input voltage equal to V
converts to $FF (full scale), with no overflow indication. For ratiometric conversions
of this type, the source of each analog input should use V
and be referenced to V
The multiplexer allows the A/D converter to select one of 16 analog signals. Eight
of these channels correspond to port E input lines to the MCU, four of the channels
are internal reference points or test functions, and four channels are reserved.
Refer to
Refer to
Refer to
Always reads 0
Refer to
0 = A/D powered down
1 = A/D powered up
0 = A/D and EEPROM use system E clock.
1 = A/D and EEPROM use internal RC clock.
0 = The oscillator startup delay coming out of stop is bypassed and the MCU
1 = A delay of approximately 4000 E-clock cycles is imposed as the MCU is
Freescale Semiconductor, Inc.
Table
For More Information On This Product,
resumes processing within about four bus cycles.
started up from the stop power-saving mode. This delay allows the
crystal oscillator to stabilize.
Section 5. Resets and
Section 5. Resets and
Section 5. Resets and Interrupts
3-1.
Analog-to-Digital (A/D) Converter
Go to: www.freescale.com
RL
.
RL
converts to $00 and an input voltage equal to V
Interrupts.
Interrupts.
and
Section 9. Timing
Analog-to-Digital (A/D) Converter
RH
as the supply voltage
Conversion Process
System.
Data Sheet
RH
67

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