R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 224

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 14.27
Figure 14.28
Module Operation Enable Register
Timer RC Mode Register
b7 b6 b5 b4
NOTES:
b7 b6 b5 b4
NOTES:
1.
2.
3.
1.
2.
3. Set the BFC bit to 0 (general register) in PWM2 mode.
When the MSTIIC bit is set to 0 (disable), any access to the SSU or the I
00B8h to 00BFh) is disabled.
When the MSTTRD bit is set to 0 (disable), any access to the timer RD associated registers (addresses 0137h to
015Fh) is disabled.
When the MSTTRC bit is set to 0 (disable), any access to the timer RC associated registers (addresses 0120h to
0132h) is disabled.
For notes on PWM2 mode, refer to 14.3.9.5 TRCMR Register in PWM2 Mode .
These bits are enabled w hen the PWM2 bit is set to 1 (timer mode or PWM mode).
Dec 05, 2007
b3 b2
b3 b2
MSTCR Register
TRCMR Register
b1 b0
b1 b0
Bit Symbol
Bit Symbol
MSTTRD
MSTTRC
TSTART
(b2-b0)
(b7-b6)
Symbol
MSTCR
Symbol
TRCMR
MSTIIC
PWMB
PWMC
PWMD
PWM2
BFC
BFD
(b6)
Page 201 of 585
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(1)
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
SSU, I
Timer RD operation enable bit
Timer RC operation enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
PWM mode of TRCIOB select bit
PWM mode of TRCIOC select bit
PWM mode of TRCIOD select bit
PWM2 mode select bit
TRCGRC register function select
bit
TRCGRD register function select
bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
TRC count start bit
(3)
2
C bus operation enable bit
Address
Bit Name
Address
Bit Name
0008h
0120h
(2)
(2)
(2)
0: Disable
1: Enable
0: Disable
1: Enable
0: Disable
1: Enable
0 : Timer mode
1 : PWM mode
0 : Timer mode
1 : PWM mode
0 : Timer mode
1 : PWM mode
0 : PWM 2 mode
1 : Timer mode or PWM mode
0 : General register
1 : Buffer register of TRCGRA register
0 : General register
1 : Buffer register of TRCGRB register
0 : Count stops
1 : Count starts
2
C bus associated registers (addresses
(1)
(2)
(3)
After Reset
After Reset
01001000b
Function
Function
00h
14. Timers
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
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