R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 508

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
18.4
Figure 18.8
Table 18.4
Function
Resolution
A/D conversion start condition • Software trigger
A/D conversion stop condition Set the ADST bit to 0
Interrupt request generation
timing
Analog input pin
Storage resister for A/D
conversion result
Reading of result of A/D
converter
In repeat mode 1, the input voltage of one pin selected from AN12 to AN19 is A/D converted repeatedly.
Table 18.4 lists the Repeat Mode 1 Specifications. Figure 18.8 shows the Operating Example of Repeat Mode 1.
Repeat Mode 1
Dec 05, 2007
Item
Repeat Mode 1 Specifications
Operating Example of Repeat Mode 1
conversion register
ADCON0 register
The above applies under the following conditions:
The ADCAP bit in the ADCON0 register is set to 0 (starts by software trigger).
ADIC register
AD0 register
AD1 register
AD2 register
AD3 register
ADST bit in
Successive
Page 485 of 585
IR bit in
The Input voltage of one pin selected by bits CH2 to CH0, ADGSEL0, and
ADGSEL1 is A/D converted repeatedly
8 bits
• Timer RD (complementary PWM mode)
When the A/D conversion result is stored in the AD3 register.
Select one of AN12 to AN19
AD0 register: 1st A/D conversion result, 5th A/D conversion result...
AD1 register: 2nd A/D conversion result, 6th A/D conversion result...
AD2 register: 3rd A/D conversion result, 7th A/D conversion result...
AD3 register: 4th A/D conversion result, 8th A/D conversion result...
Read registers AD0 to AD3
1
0
1
0
Refer to 18.1.4 A/D Conversion Start Condition
Undefined
1st
Undefined
Undefined
2nd
Undefined
1st A/D conversion result
3rd
2nd A/D conversion result
3rd A/D conversion result
4th
Specification
5th
4th A/D conversion result
conversion result
Set to 0 when interrupt
request is acknowledged,
or set by a program.
5th A/D
18. A/D Converter