R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 435

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 16.13
16.2.5
16.2.5.1
Figure 16.13 shows Initialization in Clock Synchronous Communication Mode. To initialize, set the TE bit in
the SSER register to 0 (transmit disabled) and the RE bit to 0 (receive disabled) before data transmission or
reception.
Set the TE bit to 0 and the RE bit to 0 before changing the communication mode or format.
Setting the RE bit to 0 does not change the contents of flags RDRF and ORER or the contents of the SSRDR
register.
Dec 05, 2007
Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Initialization in Clock Synchronous Communication Mode
Page 412 of 585
NOTE:
1. Write 0 after reading 1 to set the ORER bit to 0.
SSER register
SSCRH register
SSMR2 register
SSMR register
SSMR2 register
SSSR register
SSCRH register
SSER register
Set bits CKS0 to CKS2
Set RSSTP bit
RE bit ← 1 (receive)
TE bit ← 1 (transmit)
Set bits RIE, TEIE, and TIE
Start
End
SCKS bit ← 1
Set SOOS bit
CPHS bit ← 0
CPOS bit ← 0
Set MLS bit
ORER bit ← 0
SSUMS bit ← 0
Set MSS bit
RE bit ← 0
TE bit ← 0
(1)
16. Clock Synchronous Serial Interface