R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 518

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
20. Flash Memory
20.1
Table 20.1
NOTES:
Table 20.2
Flash memory operating mode
Division of erase block
Programming method
Erase method
Programming and erasure control method
Rewrite control method
Number of commands
Programming and
erasure
endurance
ID code check function
ROM code protect
Function
Areas which can
be rewritten
Operating mode
ROM Programmer None
In the flash memory, rewrite operations to the flash memory can be performed in three modes: CPU rewrite,
standard serial I/O, and parallel I/O.
Table 20.1 lists the Flash Memory Performance.
Flash memory
Rewrite mode
1. Definition of programming and erasure endurance
2. Blocks A and B are implemented only in the R8C/2D group.
3. To perform programming and erasure, use VCC = 2.7 V to 5.5 V as the supply voltage. Do not perform
The programming and erasure endurance is defined on a per-block basis. If the programming and erasure
endurance is n (n = 100 or 10,000), each block can be erased n times. For example, if 1,024 1-byte writes are
performed to block A, a 1-Kbyte block, and then the block is erased, the erase count stands at one. When
performing 100 or more rewrites, the actual erase count can be reduced by executing programming operations
in such a way that all blank areas are used before performing an erase operation. Avoid rewriting only particular
blocks and try to average out the programming and erasure endurance of the blocks. It is also advisable to
retain data on the erase count of each block and limit the number of erase operations to a certain number.
programming and erasure at less than 2.7 V.
Overview
Dec 05, 2007
(1)
Flash Memory Performance
Flash Memory Rewrite Modes
Item
Blocks 0 to 3 (program
ROM)
Blocks A and B (data
flash)
User ROM area is rewritten by executing
software commands from the CPU.
EW0 mode: Rewritable in the RAM
EW1 mode: Rewritable in flash memory
User ROM area
Single chip mode
Page 495 of 585
(2)
CPU Rewrite Mode
(3)
3 modes (CPU rewrite, standard serial I/O, and parallel I/O)
Refer to Figure 20.1 and Figure 20.2
Byte unit
Block erase
Program and erase control by software command
Rewrite control for blocks 0 to 3 by FMR02 bit in FMR0 register
Rewrite control for block 0 by FMR15 bit and Block 1 by FMR16 bit in
FMR1 register
5 commands
R8C/2C Group: 100 times; R8C/2D Group: 1,000 times
10,000 times
Standard serial I/O mode supported
Parallel I/O mode supported
User ROM area is
rewritten by a
dedicated serial
programmer.
User ROM area
Boot mode
Serial programmer Parallel programmer
Standard Serial I/O
Specification
Mode
User ROM area is
rewritten by a
dedicated parallel
programmer.
User ROM area
Parallel I/O mode
Parallel I/O Mode
20. Flash Memory