R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 583

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
22.3.3
22.3.3.1
22.3.3.2
22.3.3.3
22.3.3.4
22.3.3.5
Reading from the TRCSR register immediately after writing to it can result in the value previous to the write
being read out. To prevent this, execute the JMP.B instruction between the read and the write instructions.
Switching procedure
Switching procedure
When the CSEL bit in the TRCCR2 register is set to 1 (count stops at compare match with the TRCGRA
register), do not set the TRCMR register at compare match timing of registers TRC and TRCGRA.
•
•
•
(1) Set the TSTART bit in the TRCMR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRCCR1 register.
•
(1) Set the TSTART bit in the TRCMR register to 0 (count stops).
(2) Change the settings of bits TCK2 to TCK0 in the TRCCR1 register.
(3) Wait for a minimum of two cycles of f1.
(4) Set the FRA00 bit in the FRA0 register to 0 (high-speed on-chip oscillator off).
•
•
Dec 05, 2007
The following note applies when the CCLR bit in the TRCCR1 register is set to 1 (clear TRC register at
compare match with TRCGRA register).
When using a program to write a value to the TRC register while the TSTART bit in the TRCMR register
is set to 1 (count starts), ensure that the write does not overlap with the timing with which the TRC register
is set to 0000h.
If the timing of the write to the TRC register and the setting of the TRC register to 0000h coincide, the
write value will not be written to the TRC register and the TRC register will be set to 0000h.
Reading from the TRC register immediately after writing to it can result in the value previous to the write
being read out. To prevent this, execute the JMP.B instruction between the read and the write instructions.
Stop the count before switching the count source.
After switching the count source from fOCO40M to another clock, allow a minimum of two cycles of f1 to
elapse after changing the clock setting before stopping fOCO40M.
The pulse width of the input capture signal should be three cycles or more of the timer RC operation clock
(refer to Table 14.12 Timer RC Operation Clock).
The value of the TRC register is transferred to the TRCGRj register one or two cycles of the timer RC
operation clock after the input capture signal is input to the TRCIOj (j = A, B, C, or D) pin (when the
digital filter function is not used).
Notes on Timer RC
Program Example
Program Example
TRC Register
Count Source Switching
Input Capture Function
TRCMR Register in PWM2 Mode
TRCSR Register
Page 560 of 585
L1:
L1:
MOV.W
JMP.B
MOV.W
MOV.B
JMP.B
MOV.B
#XXXXh, TRC
L1
TRC,DATA
#XXh, TRCSR
L1
TRCSR,DATA
;Write
;JMP.B instruction
;Read
;Write
;JMP.B instruction
;Read
22. Usage Notes