R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 342

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 14.134 Registers TRD0 to TRD1 in Complementary PWM Mode
Figure 14.135 Registers TRDGRAi, TRDGRBi, TRDGRC1, and TRDGRDi in Complementary PWM Mode
Timer RD Counter 0
Timer RD Counter 1
Timer RD General Registers Ai, Bi, C1, and Di (i = 0 or 1)
(b15)
(b15)
(b15)
b7
NOTE:
b7
NOTE:
b7
NOTES:
1.
1.
The following registers are disabled in the complementary PWM mode: TRDPMR, TRDOCR, TRDDF0,
TRDDF1, TRDIORA0, TRDIORC0, TRDPOCR0, TRDIORA1, TRDIORC1, and TRDPOCR1.
1.
2. The TRDGRC0 register is not used in complementary PWM mode.
Access the TRD0 register in 16-bit units. Do not access it in 8-bit units.
Access the TRD1 register in 16-bit units. Do not access it in 8-bit units.
Access registers TRDGRAi to TRDGRDi in 16-bit units. Do not access them in 8-bit units.
Dec 05, 2007
(b8)
(b8)
(b8)
b0
b0
b0
b7
b7
b7
Set the dead time.
Count a count source. Count operation is incremented or decremented.
When an overflow occurs, the OVF bit in the TRDSR0 register is set to 1.
Select 0000h.
Count a count source. Count operation is incremented or decremented.
When an underflow occurs, the UDF bit in the TRDSR1 register is set to 1.
(1)
(1)
Refer to Table 14.47 TRDGRji Register Functions in Com plem entary PWM Mode .
Page 319 of 585
b0
b0
b0
TRDGRA0
TRDGRA1
TRDGRB0
TRDGRD0
TRDGRB1
TRDGRC1
TRDGRD1
Symbol
Symbol
Symbol
TRD0
TRD1
Function
Function
Function
(1, 2)
0147h-0146h
0157h-0156h
014Bh-014Ah
015Bh-015Ah
015Dh-015Ch
0149h-0148h
014Fh-014Eh
0159h-0158h
015Fh-015Eh
Address
Address
Address
0000h to FFFFh
0000h to FFFFh
Setting Range
Setting Range
After Reset
After Reset
After Reset
0000h
0000h
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
FFFFh
14. Timers
RW
RW
RW
RW
RW
RW