R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 452

IC R8C/2D MCU FLASH 64KB 80-LQFP

R5F212D8SNFP#U0

Manufacturer Part Number
R5F212D8SNFP#U0
Description
IC R8C/2D MCU FLASH 64KB 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/2Dr
Datasheets

Specifications of R5F212D8SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 16.24
Figure 16.25
Module Operation Enable Register
SDA output
SCL output
b7 b6 b5 b4
NOTES:
SDA input
(Master)
SCL input
1.
2.
3.
When the MSTIIC bit is set to 0 (disable), any access to the SSU or the I
00B8h to 00BFh) is disabled.
When the MSTTRD bit is set to 0 (disable), any access to the timer RD associated registers (addresses 0137h to
015Fh) is disabled.
When the MSTTRC bit is set to 0 (disable), any access to the timer RC associated registers (addresses 0120h to
0132h) is disabled.
Dec 05, 2007
b3 b2
External Circuit Connection Example of Pins SCL and SDA
MSTCR Register
b1 b0
SCL
SDA
Bit Symbol
MSTTRD
MSTTRC
(b2-b0)
(b7-b6)
Symbol
MSTCR
MSTIIC
Page 429 of 585
SDA output
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
SSU, I
Timer RD operation enable bit
Timer RC operation enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
SCL output
VCC
SDA input
(Slave 1)
SCL input
2
C bus operation enable bit
VCC
Address
Bit Name
0008h
SCL
SDA
0: Disable
1: Enable
0: Disable
1: Enable
0: Disable
1: Enable
SDA output
SCL output
(Slave 2)
SDA input
SCL input
2
C bus associated registers (addresses
(1)
(2)
(3)
16. Clock Synchronous Serial Interface
After Reset
Function
00h
SCL
SDA
SCL
SDA
RW
RW
RW
RW

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