R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 424

IC R8C/2D MCU FLASH 64KB 80-LQFP

R5F212D8SNFP#U0

Manufacturer Part Number
R5F212D8SNFP#U0
Description
IC R8C/2D MCU FLASH 64KB 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/2Dr
Datasheets

Specifications of R5F212D8SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 16.4
SS Control Register L
b7 b6 b5 b4 b3 b2 b1 b0
NOTES:
1.
2.
3. Do not w rite to the SOL bit during data transfer.
Registers SSCRH, SSCRL, SSMR, SSER, SSSR, SSMR2, SSTDR, and SSRDR.
The data output after serial data is output can be changed by w riting to the SOL bit before or after transfer. When
w riting to the SOL bit, set the SOLP bit to 0 and the SOL bit to 0 or 1 simultaneously by the MOV instruction.
Dec 05, 2007
SSCRL Register
Bit Symbol
(b3-b2)
Symbol
SSCRL
SRES
SOLP
(b0)
SOL
(b6)
(b7)
Page 401 of 585
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
Clock synchronous
serial I/O w ith chip
select control part
reset bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
SOL w rite protect bit
Serial data output value
setting bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
Address
Bit Name
00B9h
(2)
When this bit is set to 1, the clock synchronous serial
I/O w ith chip select control block and SSTRSR register
are reset.
The values of the registers
serial I/O w ith chip select register are maintained.
The output level can be changed by the SOL bit w hen
this bit is set to 0.
The SOLP bit remains unchanged even if 1 is w ritten to
it. When read, the content is 1.
When read
0 : The serial data output is set to “L”.
1 : The serial data output is set to “H”.
When w ritten
0 : The data output is “L” after the serial data output.
1 : The data output is “H” after the serial data output.
(2,3)
16. Clock Synchronous Serial Interface
After Reset
01111101b
Function
(1)
in the clock synchronous
RW
RW
RW
RW

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