R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 517

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 19.2
Figure 19.3
VREF
D/Ai Register (i = 0 or 1)
D/A Control Register
AVSS
DAi
b7
NOTE:
b7 b6 b5 b4 b3 b2 b1 b0
NOTE:
(2)
1.
1.
i = 0 to 1
NOTES:
DAi register
1. The above diagram applies when the value of the DAi register is 2Ah.
2. VREF is not affected by the setting of the VCUT bit in the ADCON1 register.
When not using the D/A converter, set the DAiE bit (i = 0 or 1) to 0 (output disabled) and set the DAi register to 00h to
prevent current from flow ing into the R-2R resistor ladder to reduce unnecessary current consumption.
When not using the D/A converter, set the DAiE bit (i = 0 or 1) to 0 (output disabled) and set the DAi register to 00h to
prevent current from flow ing into the R-2R resistor ladder to reduce unnecessary current consumption.
Dec 05, 2007
r
Registers DA0 to DA1 and DACON
DAiE bit
D/A Converter Equivalent Circuit
MSB
b0
0
1
2R
Output value of D/A conversion
0
(1)
Bit Symbol
DACON
(b7-b2)
Symbol
Symbol
DA0E
DA1E
DA0
DA1
—
(1)
Page 494 of 585
1
R
2R
D/A0 output enable bit
D/A1 output enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
R
2R
Address
Function
Address
Bit Name
00DAh
00D8h
00DCh
R
2R
0 : Output disabled
1 : Output enabled
0 : Output disabled
1 : Output enabled
R
2R
R
2R
After Reset
After Reset
Function
00h
00h
00h
Setting Range
00h to FFh
R
2R
R
2R
19. D/A Converter
LSB
2R
RW
RW
RW
RW
RW
—