R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 525

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
20.4.2.1
20.4.2.2
20.4.2.3
20.4.2.4
20.4.2.5
20.4.2.6
20.4.2.7
20.4.2.8
20.4.2.9
Figure 20.5 shows the FMR0 Register, Figure 20.6 shows the FMR1 Register and Figure 20.7 shows the FMR4
Register.
This bit indicates the operating status of the flash memory. The bits value is 0 during programming, erasure
(including suspend periods), or erase-suspend mode; otherwise, it is 1.
The MCU is made ready to accept commands by setting the FMR01 bit to 1 (CPU rewrite mode).
Rewriting of blocks 0 to 3 does not accept program or block erase commands if the FMR02 bit is set to 0
(rewrite disabled).
Rewriting of blocks 2 and 3 is enabled, if the FMR02 bit is set to 1 (rewrite enabled). Rewriting of blocks 0 and
1 is controlled by bits FMR15 and FMR16 if the FMR02 bit is set to 1 (rewrite enabled).
This bit is used to initialize the flash memory control circuits, and also to reduce the amount of current
consumed by the flash memory. Access to the flash memory is disabled by setting the FMSTP bit to 1.
Therefore, the FMSTP bit must be written to by a program transferred to the RAM.
In the following cases, set the FMSTP bit to 1:
Figure 20.11 shows the handling to provide lower consumption in high-speed on-chip oscillator mode, low-
speed on-chip oscillator mode (XIN clock stops), and low-speed clock mode (XIN clock stops). Handle
according to this flowchart. Note that when going to stop or wait mode while the CPU rewrite mode is disabled,
the FMR0 register does not need to be set because the power for the flash memory is automatically turned off
and is turned back on again after returning from stop or wait mode.
This is a read-only bit indicating the status of an auto-program operation. The bit is set to 1 when a program
error occurs; otherwise, it is set to 0. For details, refer to the description in 20.4.5 Full Status Check.
This is a read-only bit indicating the status of an auto-erase operation. The bit is set to 1 when an erase error
occurs; otherwise, it is set to 0. Refer to 20.4.5 Full Status Check for details.
Setting this bit to 1 (EW1 mode) places the MCU in EW1 mode.
When the FMR02 bit is set to 1 (rewrite enabled) and the FMR15 bit is set to 0 (rewrite enabled), block 0
accepts program and block erase commands.
When the FMR02 bit is set to 1 (rewrite enabled) and the FMR16 bit is set to 0 (rewrite enabled), block 1
accepts program and block erase commands.
•
•
Dec 05, 2007
When flash memory access resulted in an error while erasing or programming in EW0 mode (FMR00 bit
not reset to 1 (ready))
To provide lower consumption in high-speed on-chip oscillator mode, low-speed on-chip oscillator mode
(XIN clock stops), and low-speed clock mode (XIN clock stops).
FMR00 Bit
FMR01 Bit
FMR02 Bit
FMSTP Bit
FMR06 Bit
FMR07 Bit
FMR11 Bit
FMR15 Bit
FMR16 Bit
Page 502 of 585
20. Flash Memory