R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 375

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 14.163 TRECR2 Register in Real-Time Clock Mode
Table 14.53
Periodic interrupt
triggered every week
Periodic interrupt
triggered every day
Periodic interrupt
triggered every hour
Periodic interrupt
triggered every minute
Periodic interrupt
triggered every second
Timer RE Control Register 2
b7 b6 b5 b4
NOTE:
1.
0
Do not set multiple enable bits to 1 (enable interrupt).
Dec 05, 2007
Factor
b3 b2
Interrupt Sources
b1 b0
Bit Symbol
TRECR2
(b7-b6)
Symbol
COMIE
DYIE
WKIE
SEIE
MNIE
HRIE
Page 352 of 585
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Value in TREWK register is set to 000b (Sunday)
(1-week period)
TREWK register is updated (1-day period)
TREHR register is updated (1-hour period)
TREMIN register is updated (1-minute period)
TRESEC register is updated (1-second period)
Periodic interrupt triggered every
second enable bit
Periodic interrupt triggered every
minute enable bit
Periodic interrupt triggered every
hour enable bit
Periodic interrupt triggered every day
enable bit
Periodic interrupt triggered every
w eek enable bit
Compare match interrupt enable bit
Nothing is assigned. If necessary, set to 0.
When read, the content is 0.
(1)
Address
Bit Name
(1)
011Dh
(1)
(1)
(1)
Interrupt Source
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
0 : Disable periodic interrupt triggered
1 : Enable periodic interrupt triggered
Set to 0 in real-time clock mode.
every second
every second
every minute
every minute
every hour
every hour
every day
every day
every w eek
every w eek
After Reset
Function
00h
Interrupt Enable Bit
WKIE
MNIE
DYIE
HRIE
SEIE
14. Timers
RW
RW
RW
RW
RW
RW
RW
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