R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 493

IC R8C/2D MCU FLASH 64KB 80-LQFP

R5F212D8SNFP#U0

Manufacturer Part Number
R5F212D8SNFP#U0
Description
IC R8C/2D MCU FLASH 64KB 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/2Dr
Datasheets

Specifications of R5F212D8SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 17.10
Hardware LIN Read the Synch Field measurement-
UART0 Set the UART0 communication rate
Timer RA Set the Synch Break width again
UART0 Communication via UART0
Dec 05, 2007
U0BRG register
Clock asynchronous serial interface (UART) mode
Transmit ID field
TRAPRE register
TRA register
Example of Header Field Reception Flowchart (3)
completed flag
SFDCT flag in the LINST register
SFDCT = 1 ?
Page 470 of 585
YES
YES
B
NO
Hardware LIN measures the Synch
Field.
The interrupt of timer RA may be
used (the SBDCT flag is set when
the timer RA counter underflows
upon reaching the terminal count).
When the SBE bit in the LINCR
register is set to 0 (unmasked after
Synch Break is detected), timer RA
may be used in timer mode after the
SBDCT flag in the LINST register is
set to 1.
Set a communication rate based on
the Synch Field measurement
result.
Communication via UART0
(The SBDCT flag is set when the
timer RA counter underflows upon
reaching the terminal count.)
17. Hardware LIN

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