R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 233

IC R8C/2D MCU FLASH 64KB 80-LQFP

R5F212D8SNFP#U0

Manufacturer Part Number
R5F212D8SNFP#U0
Description
IC R8C/2D MCU FLASH 64KB 80-LQFP
Manufacturer
Renesas Electronics America
Series
R8C/2x/2Dr
Datasheets

Specifications of R5F212D8SNFP#U0

Core Processor
R8C
Core Size
16/32-Bit
Speed
20MHz
Connectivity
I²C, LIN, SIO, SSU, UART/USART
Peripherals
POR, PWM, Voltage Detect, WDT
Number Of I /o
71
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
3K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 5.5 V
Data Converters
A/D 20x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 85°C
Package / Case
80-LQFP
For Use With
R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 14.38
14.3.3
Table 14.15
f1, f2, f4, f8, f32
fOCO40M
External signal input
to TRCCLK pin
14.3.3.1
Count Source
The method of selecting the count source is common to all modes.
Table 14.15 lists the Count Source Selection, and Figure 14.38 shows a Count Source Block Diagram.
The pulse width of the external clock input to the TRCCLK pin should be three cycles or more of the timer RC
operation clock (see Table 14.12 Timer RC Operation Clock).
To select fOCO40M as the count source, set the FRA00 bit in the FRA0 register set to 1 (high-speed on-chip
oscillator on), and then set bits TCK2 to TCK0 in the TRCCR1 register to 110b (fOCO40M).
fOCO40M
TRCCLK
Dec 05, 2007
Common Items for Multiple Modes
f32
f1
f2
f4
f8
Count Source
Count Source Selection
Count Source Block Diagram
TCK2 to TCK0: Bits in TRCCR1 register
Count source selected using bits TCK2 to TCK0 in TRCCR1 register
FRA00 bit in FRA0 register set to 1 (high-speed on-chip oscillator on) and bits
TCK2 to TCK0 in TRCCR1 register are set to 110b (fOCO40M)
Bits TCK2 to TCK0 in TRCCR1 register are set to 101b (count source is rising edge
of external clock) and PD5_0 bit in PD5 register is set is set to 0 (input mode)
Page 210 of 585
= 011b
= 010b
= 100b
= 101b
= 001b
TCK2 to TCK0
= 000b
= 110b
Selection Method
Count source
TRC register
14. Timers

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