R5F212D8SNFP#U0 Renesas Electronics America, R5F212D8SNFP#U0 Datasheet - Page 398

• Manufacturer Part Number: R5F212D8SNFP#U0
• Description: IC R8C/2D MCU FLASH 64KB 80-LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/2Dr

Specifications of R5F212D8SNFP#U0

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, PWM, Voltage Detect, WDT
• Number Of I /o: 71
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 3K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 5.5 V
• Data Converters: A/D 20x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 80-LQFP
• For Use With: R0K5212D8S001BE - KIT STARTER FOR R8C/2DR0K5212D8S000BE - KIT DEV FOR R8C/2D
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R8C/2C Group, R8C/2D Group
Rev.2.00
REJ09B0339-0200
Figure 14.184 Operating Example in Output Compare Mode (“L” and “H” Held Output in Count
In output compare mode, the same PWM waveform is output from all of pins TRFO00 to TRFO02 and
TRFO10 to TRFO12 during count operation. Note that the output waveform can be inverted for pins TRFO00
to TRFO02 or for pins TRFO10 to TRFO12. The output can also be fixed at “L” or “H” for individual pins for
a given period.
The behavior when count operation stops can be selected from the following two options: the output level
before the count stops is maintained, or output is fixed at “L” or “H”.
The values in the compare i register can be read by reading the TRFMi (i = 0 or 1) register. Writing to the
TRFMi register causes the values to be stored in the compare i register in the following timing:
• If the TSTART bit is set to 0 (count stops)
• If the TSTART bit is set to 1 (count starts) and the CCLR bit in the TRFCR1 register is set to 0 (free running)
• If the TSTART bit is set to 1 and the CCLR bit is set to 1 (TRF register set to 0000h at compare 1 match)
Values are stored simultaneously with the write to the TRFMi register.
Values are stored when the TRF register (counter) overflows.
Values are stored when the compare 1 and TRF register (counter) values match.
Dec 05, 2007
Stops)
TRFO00 output
TRFO10 output
(internal signal)
P8 register
P8 register
P8_0 bit in
P8_3 bit in
The above applies under the following conditions.
TRFOUT0 bit in TRFOUT register = 1 (TRFO00 output enabled)
TRFOUT3 bit in TRFOUT register = 1 (TRFO10 output enabled)
TRFOUT6 bit in TRFOUT register = 0 (TRFO00 to TRFO02 output not inverted)
TRFOUT7 bit in TRFOUT register = 1 (TRFO10 to TRFO12 output inverted)
TSTART bit in TRFCR0 register = 1 (count starts)
CMP output
Page 375 of 585
1
0
1
0
Set to 1 by program
Set to 0 by program
14. Timers