MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 165

IC MPU 32BIT COLDF 90MHZ 208FQFP

MCF5307AI90B

Manufacturer Part Number
MCF5307AI90B
Description
IC MPU 32BIT COLDF 90MHZ 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets

Specifications of MCF5307AI90B

Core Processor
Coldfire V3
Core Size
32-Bit
Speed
90MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Maximum Clock Frequency
90 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
90MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
FQFP
Program Memory Size
8KB
Cpu Speed
90MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCF5307AI90B
Manufacturer:
FREESCAL
Quantity:
153
Part Number:
MCF5307AI90B
Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
MCF5307AI90B
Manufacturer:
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Quantity:
20 000
5.5.3.3.11 Write Control Register (
The operand (longword) data is written to the specified control register. The write alters all
32 register bits.
Command/Result Formats:
Command Sequence:
Operand Data:
Result Data:
Command
WCREG
Result
???
15
14
"NOT READY"
0x2
0x0
0x0
EXT WORD
MS ADDR
Figure 5-38.
This instruction requires two longword operands. The first selects the
register to which the operand data is to be written; the second
contains the data.
Successful write operations return 0xFFFF. Bus errors on the write
cycle are indicated by the setting of bit 16 in the status message and
by a data pattern of 0x0001.
13
Figure 5-39.
Freescale Semiconductor, Inc.
For More Information On This Product,
12
11
"NOT READY"
Chapter 5. Debug Support
EXT WORD
MS ADDR
Go to: www.freescale.com
WCREG
WCREG
10
0x8
0x0
Command/Result Formats
9
WCREG
Command Sequence
"NOT READY"
"NOT READY"
D[31:16]
MS DATA
8
D[15:0]
LS DATA
)
7
6
0x8
0x0
Rc
REGISTER
CONTROL
LOCATION
WRITE
MEMORY
WRITE
Background Debug Mode (BDM)
5
4
3
2
"NOT READY"
"CMD COMPLETE"
0x0
0x0
BERR
"NOT READY"
XXX
XXX
NEXT CMD
XXX
NEXT CMD
1
0
5-37

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