MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 390

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

1
Bus Characteristics
18.3 Bus Characteristics
The MCF5307 uses an input clock signal (CLKIN) to generate its internal clock. BCLKO
is the bus clock rate, where all bus operations are synchronous to the rising edge of
BCLKO. Some of the bus control signals (BE/BWE, OE, CSx, and AS) are synchronous to
the falling edge, shown in Figure 18-1. Bus characteristics may differ somewhat for
interfacing with external DRAM.
18-2
These signals change after the falling edge. In Chapter 20, “Electrical Specifications,” these signals are specified
off the rising edge because CLKIN is squared up internally.
Falling-Edge
Rising-Edge
Signal Name
IRQ[7,5,3,1]
SIZ[1:0]
TM[2:0]
TT[1:0]
BCLKO
Signals
Signals
OE
R/W
TIP
Inputs
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TS
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=Required input setup time relative to BCLKO edge
=Required input hold time relative to BCLKO edge
=Propagation delay of signal relative to BCLKO edge
=Output hold time relative to BCLKO edge
1
Figure 18-1. Signal Relationship to BCLKO for Non-DRAM Access
Table 18-1. ColdFire Bus Signal Summary (Continued)
Interrupt request
Output enable
Read/write
Transfer size
Transfer acknowledge
Transfer in progress
Transfer modifier
Transfer start
Transfer type
Freescale Semiconductor, Inc.
Description
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For More Information On This Product,
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Go to: www.freescale.com
MCF5307 User’s Manual
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MCF5307 Master
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Three-state
Three-state
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Three-state
External Master
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Rising
Falling
Rising
Rising
Rising
Rising
Rising
Rising
Rising
Edge
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