MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 61

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Chapter 2
ColdFire Core
This chapter provides an overview of the microprocessor core of the MCF5307. The
chapter begins with a description of enhancements from the Version 2 (V2) ColdFire core,
and then fully describes the V3 programming model as it is implemented on the MCF5307.
It also includes a full description of exception handling, data formats, an instruction set
summary, and a table of instruction timings.
2.1 Features and Enhancements
The MCF5307 is the first standard product to contain a Version 3 ColdFire microprocessor
core. To reach higher levels of frequency and performance, numerous enhancements were
made to the V2 architecture. Most notable are a deeper instruction pipeline, branch
acceleration, and a unified cache, which together provide 75 (Dhrystone 2.1) MIPS at 90
MHz.
The MCF5307 core design emphasizes performance, and backward compatibility
represents the next step on the ColdFire performance roadmap.
The following list summarizes MCF5307 features:
• Variable-length RISC, clock-multiplied Version 3 microprocessor core
• Two independent, decoupled pipelines—four-stage instruction fetch pipeline (IFP)
• Eight-instruction FIFO buffer provides decoupling between the pipelines
• Branch prediction mechanisms for accelerating program execution
• 32-bit internal address bus supporting 4 Gbytes of linear address space
• 32-bit data bus
• 16 user-accessible, 32-bit-wide, general-purpose registers
• Supervisor/user modes for system protection
• Vector base register to relocate exception-vector table
• Optimized for high-level language constructs
and two-stage operand execution pipeline (OEP)
Freescale Semiconductor, Inc.
For More Information On This Product,
Chapter 2. ColdFire Core
Go to: www.freescale.com
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