MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 448

• Manufacturer Part Number: MCF5307AI90B
• Description: IC MPU 32BIT COLDF 90MHZ 208FQFP
• Manufacturer: Freescale Semiconductor
• Series: MCF530xr

Specifications of MCF5307AI90B

• Core Processor: Coldfire V3
• Core Size: 32-Bit
• Speed: 90MHz
• Connectivity: EBI/EMI, I²C, UART/USART
• Peripherals: DMA, POR, WDT
• Number Of I /o: 16
• Program Memory Type: ROMless
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 208-FQFP
• Maximum Clock Frequency: 90 MHz
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Family Name: MCF5xxx
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 90MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: FQFP
• Program Memory Size: 8KB
• Cpu Speed: 90MHz
• Embedded Interface Type: I2C, UART
• Digital Ic Case Style: FQFP
• No. Of Pins: 208
• Supply Voltage Range: 3V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Reset Timing Specifications
20.4 Reset Timing Specifications
Table 20-7 lists specifications for the reset timing parameters shown in Figure 20-11.
Figure 20-11 shows reset timing for the values in Table 20-7.
20.5 Debug AC Timing Specifications
Table 20-8 lists specifications for the debug AC timing parameters shown in Figure 20-13.
20-12
Note: Mode selects are registered on the rising CLKIN edge before the cycle in which RSTI is
recognized as being negated.
D1
D2
D3
1
Num
R1
R2
R3
Num
RSTI and D[7:0] are synchronized internally. Setup and hold times must be met
only if recognition on a particular clock is required.
1
CLKIN
D[7:0]
RSTI
PST, DDATA to PSTCLK setup
PSTCLK to PST, DDATA hold
DSI-to-DSCLK setup
R1
Valid to CLKIN (setup)
CLKIN to invalid (hold)
RSTI to invalid (hold)
Table 20-8. Debug AC Timing Specification
Freescale Semiconductor, Inc.
Table 20-7. Reset Timing Specification
Characteristic
Characteristic
For More Information On This Product,
Figure 20-11. Reset Timing
Go to: www.freescale.com
R2
MCF5307 User’s Manual
Min
7.5
Min
7.5
7.5
3
3
1
66 MHz
66 MHz
Max
—
—
—
Max
Min
5.5
2
2
Min
5.5
5.5
90 MHz
1
90 MHz
Max
—
—
—
Max
R3
R1
PSTCLKs
Units
nS
nS
nS
Units
nS
nS