MCF5307AI90B Freescale Semiconductor, MCF5307AI90B Datasheet - Page 318
![IC MPU 32BIT COLDF 90MHZ 208FQFP](/photos/12/43/124330/mcf5307ai90b_sml.jpg)
MCF5307AI90B
Manufacturer Part Number
MCF5307AI90B
Description
IC MPU 32BIT COLDF 90MHZ 208FQFP
Manufacturer
Freescale Semiconductor
Series
MCF530xr
Datasheets
1.MCF5307AI66B.pdf
(484 pages)
2.MCF5307AI66B.pdf
(16 pages)
3.MCF5307AI66B.pdf
(2 pages)
Specifications of MCF5307AI90B
Core Processor
Coldfire V3
Core Size
32-Bit
Speed
90MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
DMA, POR, WDT
Number Of I /o
16
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
208-FQFP
Maximum Clock Frequency
90 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Family Name
MCF5xxx
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
90MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
3.3V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
FQFP
Program Memory Size
8KB
Cpu Speed
90MHz
Embedded Interface Type
I2C, UART
Digital Ic Case Style
FQFP
No. Of Pins
208
Supply Voltage Range
3V To 3.6V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF5307AI90B
Manufacturer:
FREESCAL
Quantity:
153
Company:
Part Number:
MCF5307AI90B
Manufacturer:
Freescale Semiconductor
Quantity:
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Part Number:
MCF5307AI90B
Manufacturer:
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Register Descriptions
14.3.4 UART Clock-Select Registers (UCSRn)
The UART clock-select registers (UCSRn) select an external clock on the TIN input
(divided by 1 or 16) or a prescaled BCLKO as the clocking source for the transmitter and
receiver. See Section 14.5.1, “Transmitter/Receiver Clock Source.” The transmitter and
receiver can use different clock sources. To use BCLKO for both, set UCSRn to 0xDD.
14-8
Bits
Address
5
4
3
2
1
0
Reset
Field
R/W
TxEMP Transmitter empty.
RxRDY Receiver ready
TxRDY
FFULL
Name
OE
PE
7
Parity error. Valid only if RxRDY = 1.
0 No parity error occurred.
1 If UMR1n[PM] = 0x (with parity or force parity), the corresponding character in the FIFO was
Overrun error. Indicates whether an overrun occurs.
0 No overrun occurred.
1 One or more characters in the received data stream have been lost. OE is set upon receipt of a
0 The transmitter buffer is not empty. Either a character is being shifted out, or the transmitter is
1 The transmitter has underrun (both the transmitter holding register and transmitter shift registers
Transmitter ready.
0 The CPU loaded the transmitter holding register or the transmitter is disabled.
1 The transmitter holding register is empty and ready for a character. TxRDY is set when a
FIFO full.
0 The FIFO is not full but may hold up to two unread characters.
1 A character was received and is waiting in the receiver buffer FIFO.
0 The CPU has read the receiver buffer and no characters remain in the FIFO after this read.
1 One or more characters were received and are waiting in the receiver buffer FIFO.
received with incorrect parity. If UMR1n[PM] = 11 (multidrop), PE stores the received A/D bit.
new character when the FIFO is full and a character is already in the shift register waiting for an
empty FIFO position. When this occurs, the character in the receiver shift register and its break
detect, framing error status, and parity error, if any, are lost. OE is cleared by the
STATUS
disabled. The transmitter is enabled/disabled by programming UCRn[TC].
are empty). This bit is set after transmission of the last stop bit of a character if there are no
characters in the transmitter holding register awaiting transmission.
character is sent to the transmitter shift register and when the transmitter is first enabled. If the
transmitter is disabled, characters loaded into the transmitter holding register are not sent.
Figure 14-5. UART Clock-Select Register (UCSRn)
Table 14-4. USRn Field Descriptions (Continued)
command in UCRn.
Freescale Semiconductor, Inc.
For More Information On This Product,
RCS
MBAR + 0x1C4 (UCSR0), 0x204 (UCSR1)
Go to: www.freescale.com
MCF5307 User’s Manual
4
0000_0000
Write only
Description
3
TCS
RESET ERROR
0
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