HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 356

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 10 Programmable Timing Pattern Controller (TPC)
10.2.3
PBDDR is an 8-bit write-only register that selects input or output for each pin in port B.
Port B is multiplexed with pins TP
be set to 1. For further information about PBDDR, see section 7.12, Port B.
10.2.4
PBDR is an 8-bit readable/writable register that stores TPC output data for groups 2 and 3, when
these TPC output groups are used.
For further information about PBDR, see section 7.12, Port B.
Rev. 2.00 Sep 20, 2005 page 316 of 800
REJ09B0260-0200
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Note: * Bits selected for TPC output by NDERB settings become read-only bits.
Port B Data Direction Register (PBDDR)
Port B Data Register (PBDR)
PB DDR
R/(W) *
PB
7
W
0
7
0
7
7
PB DDR
R/(W) *
PB
6
W
0
6
0
6
6
15
to TP
PB DDR
R/(W) *
PB
5
W
0
5
0
5
8
5
. Bits corresponding to pins used for TPC output must
Port B data direction 7 to 0
These bits select input or
output for port B pins
Port B data 7 to 0
These bits store output data
for TPC output groups 2 and 3
PB DDR
R/(W) *
PB
4
W
0
4
0
4
4
PB DDR
R/(W) *
PB
3
W
0
3
0
3
3
PB DDR
R/(W) *
PB
2
W
0
2
0
2
2
PB DDR
R/(W) *
PB
1
W
0
1
0
1
1
PB DDR
R/(W) *
PB
0
W
0
0
0
0
0