HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 591

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

On-Chip RAM Area Divisions in Boot Mode: In boot mode, the RAM area is divided into an
area used by the boot program and an area to which the user program is transferred via the SCI, as
shown in figure 18.8. The boot program area becomes available when a transition is made to the
execution state for the user program transferred to RAM.
Notes on Use of Boot Mode:
1. When the H8/3024F-ZTAT version chip comes out of reset in boot mode, it measures the low
2. In boot mode, if any data has been programmed into the flash memory (if all data is not 1), all
3. Interrupts cannot be used while the flash memory is being programmed or erased.
4. The RxD
5. Before branching to the user program the H8/3024F-ZTAT version terminates transmit and
Note: The boot program area cannot be used until a transition is made to the execution state
period of the input at the SCI’s RxD
ends, it takes about 100 states for the chip to get ready to measure the low period of the RxD
input.
flash memory blocks are erased. Boot mode is for use when user program mode is unavailable,
such as the first time on-board programming is performed, or if the program activated in user
program mode is accidentally erased.
receive operations by the on-chip SCI (channel 1) (by clearing the RE and TE bits to 0 in the
serial control register (SCR)), but the adjusted bit rate value remains set in the bit rate register
for the user program transferred to RAM. Note also that the boot program remains in
this area in RAM even after control branches to the user program.
1
and TxD
1
lines should be pulled up on the board.
Figure 18.8 RAM Areas in Boot Mode
H'FFFF1F
H'FFEF20
H'FFF51F
1
pin. The reset should end with RxD
Section 18 Flash Memory [H8/3024F-ZTAT Version]
Boot program
User program
transfer area
area
Rev. 2.00 Sep 20, 2005 page 551 of 800
1
high. After the reset
REJ09B0260-0200
1