HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 550
HD64F3026X25
Manufacturer Part Number
HD64F3026X25
Description
MCU 3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.DF3026XBL25V.pdf
(843 pages)
Specifications of HD64F3026X25
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
70
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
HD64F3026X25
Manufacturer:
Renesas Electronics America
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10 000
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Section 17 Flash Memory [H8/3026F-ZTAT Version]
Rev. 2.00 Sep 20, 2005 page 510 of 800
REJ09B0260-0200
Notes: 1. Prewriting (setting erase block data to all 0s) is not necessary.
2. Verify data is read in 16-bit (word) units.
3. Make only a single-bit specification in the erase block registers (EBR1 and EBR2). Two or more bits must not be set simultaneously.
4. Erasing is performed in block units. To erase multiple blocks, each block must be erased in turn.
5. The wait times and the value of N are shown in section 21.2.6, Flash Memory Characteristics.
Figure 17.11 Erase/Erase-Verify Flowchart (Single-Block Erasing)
Increment
address
No
Set block start address as verify address
H'FF dummy write to verify address
Clear ESU bit in FLMCR1
Clear SWE bit in FLMCR1
Set SWE bit in FLMCR1
Set ESU bit in FLMCR1
Clear EV bit in FLMCR1
Clear E bit in FLMCR1
Set EV bit in FLMCR1
Last address of block?
Set E bit in FLMCR1
Set EBR1 or EBR2
Verify data = all 1s?
Read verify data
End of erasing
Wait (t
Wait (t
Wait (t
Wait (t
Wait (t
Disable WDT
Wait (t
Wait (t
Wait (t
Enable WDT
Wait (t
n = 1
Start
sswe
cswe
sesu
cesu
sevr
sev
cev
se
ce
Yes
Yes
) ms
) s
) s
) s
) s
) s
) s
) s
) s
*1
No
*5
*5
*5
*3, *4
*5
Start of erase
*5
End of erase
*5
*5
*5
*5
*2
Perform erasing in block units.
Clear SWE bit in FLMCR1
Clear EV bit in FLMCR1
Wait (t
Wait (t
Erase failure
n
cswe
cev
N?
Yes
) s
) s
*5
No
n
*5
*5
n + 1
Re-erase
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