HD64F3026X25 Renesas Electronics America, HD64F3026X25 Datasheet - Page 403

• Manufacturer Part Number: HD64F3026X25
• Description: MCU 3V 256K 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3026X25

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 6—Receive Interrupt Enable (RIE): Enables or disables the receive-data-full interrupt (RXI)
requested when the RDRF flag in SSR is set to 1 due to transfer of serial receive data from RSR to
RDR; also enables or disables the receive-error interrupt (ERI).
Bit 6
RIE
0
1
Note: * RXI and ERI interrupt requests can be cleared by reading the value 1 from the RDRF, FER,
Bit 5—Transmit Enable (TE): Enables or disables the start of SCI serial transmitting operations.
Bit 5
TE
0
1
Notes: 1. The TDRE flag is fixed at 1 in SSR.
Bit 4—Receive Enable (RE): Enables or disables the start of SCI serial receiving operations.
Bit 4
RE
0
1
Notes: 1. Clearing the RE bit to 0 does not affect the RDRF, FER, PER, and ORER flags. These
PER, or ORER flag, then clearing the flag to 0; or by clearing the RIE bit to 0.
2. In the enabled state, serial transmission starts when the TDRE flag in SSR is cleared to
2. In the enabled state, serial receiving starts when a start bit is detected in asynchronous
0 after writing of transmit data into TDR. Select the transmit format in SMR before
setting the TE bit to 1.
flags retain their previous values.
mode, or serial clock input is detected in synchronous mode. Select the receive format
in SMR before setting the RE bit to 1.
Description
Receive-data-full (RXI) and receive-error (ERI) interrupt requests are disabled *
Receive-data-full (RXI) and receive-error (ERI) interrupt requests are enabled
Description
Transmitting disabled *
Transmitting enabled *
Description
Receiving disabled *
Receiving enabled *
2
1
2
1
Section 12 Serial Communication Interface
Rev. 2.00 Sep 20, 2005 page 363 of 800
REJ09B0260-0200
(Initial value)
(Initial value)
(Initial value)