PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 111

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8.0
8.1
All PIC18 devices include an 8 x 8 hardware multiplier
as part of the ALU. The multiplier performs an unsigned
operation and yields a 16-bit result that is stored in the
product register pair, PRODH:PRODL. The multiplier’s
operation does not affect any flags in the STATUS
register.
Making multiplication a hardware operation allows it to
be completed in a single instruction cycle. This has the
advantages of higher computational throughput and
reduced code size for multiplication algorithms and
allows the PIC18 devices to be used in many applica-
tions previously reserved for digital signal processors.
A comparison of various hardware and software
multiply operations, along with the savings in memory
and execution time, is shown in
8.2
Example 8-1
unsigned multiplication. Only one instruction is required
when one of the arguments is already loaded in the
WREG register.
Example 8-2
multiplication. To account for the sign bits of the
arguments, each argument’s Most Significant bit (MSb)
is tested and the appropriate subtractions are done.
TABLE 8-1:
 2010 Microchip Technology Inc.
8 x 8 unsigned
8 x 8 signed
16 x 16 unsigned
16 x 16 signed
Routine
8 x 8 HARDWARE MULTIPLIER
Introduction
Operation
shows the instruction sequence for an 8 x 8
shows the sequence to do an 8 x 8 signed
PERFORMANCE COMPARISON FOR VARIOUS MULTIPLY OPERATIONS
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Without hardware multiply
Hardware multiply
Multiply Method
Table
8-1.
Program
Memory
(Words)
Preliminary
13
33
21
28
52
35
1
6
Cycles
(Max)
242
254
69
91
28
40
EXAMPLE 8-1:
EXAMPLE 8-2:
1
6
MOVF
MULWF
MOVF
MULWF
BTFSC
SUBWF
MOVF
BTFSC
SUBWF
PIC18(L)F2X/4XK22
@ 64 MHz @ 40 MHz @ 10 MHz @ 4 MHz
62.5 ns
15.1 s
15.9 s
375 ns
4.3 s
5.7 s
1.8 s
2.5 s
ARG1, W
ARG2
ARG1, W
ARG2
ARG2, SB
PRODH, F
ARG2, W
ARG1, SB
PRODH, F
24.2 s
25.4 s
100 ns
600 ns
6.9 s
9.1 s
2.8 s
4.0 s
8 x 8 UNSIGNED
MULTIPLY ROUTINE
8 x 8 SIGNED MULTIPLY
ROUTINE
;
; ARG1 * ARG2 ->
; PRODH:PRODL
; ARG1 * ARG2 ->
; PRODH:PRODL
; Test Sign Bit
; PRODH = PRODH
;
; Test Sign Bit
; PRODH = PRODH
;
Time
102.6 s
27.6 s
36.4 s
96.8 s
16.0 s
11.2 s
400 ns
2.4 s
DS41412D-page 111
- ARG1
- ARG2
242 s
254 s
69 s
91 s
28 s
40 s
1 s
6 s