PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 319

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

The module uses the edge Status bits to control the
current source output to external analog modules (such
as the A/D Converter). Current is only supplied to
external modules when only one (but not both) of the
Status bits is set, and shuts current off when both bits
are either set or cleared. This allows the CTMU to
measure current only during the interval between
edges. After both Status bits are set, it is necessary to
clear them before another measurement is taken. Both
bits should be cleared simultaneously, if possible, to
avoid re-enabling the CTMU current source.
In addition to being set by the CTMU hardware, the
edge Status bits can also be set by software. This is
also the user’s application to manually enable or
disable the current source. Setting either one (but not
both) of the bits enables the current source. Setting or
clearing both bits at once disables the source.
19.1.5
The CTMU sets its interrupt flag (PIR3<2>) whenever
the current source is enabled, then disabled. An
interrupt is generated only if the corresponding
interrupt enable bit (PIE3<2>) is also set. If edge
sequencing is not enabled (i.e., Edge 1 must occur
before Edge 2), it is necessary to monitor the edge
Status bits and determine which edge occurred last
and caused the interrupt.
 2010 Microchip Technology Inc.
INTERRUPTS
Preliminary
19.2
The following sequence is a general guideline used to
initialize the CTMU module:
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. Clear the Edge Status bits: EDG2STAT and
11. Enable both edge inputs by setting the EDGEN
Depending on the type of measurement or pulse
generation being performed, one or more additional
modules may also need to be initialized and configured
with the CTMU module:
• Edge Source Generation: In addition to the
• Capacitance or Time Measurement: The CTMU
• Pulse Generation: When generating system clock
external edge input pins, both Timer1 and the
Output Compare/PWM1 module can be used as
edge sources for the CTMU.
module uses the A/D Converter to measure the
voltage across a capacitor that is connected to one
of the analog input channels.
independent output pulses, the CTMU module
uses Comparator 2 and the associated
comparator voltage reference.
PIC18(L)F2X/4XK22
Select the current source range using the IRNG
bits (CTMUICON<1:0>).
Adjust the current source trim using the ITRIM
bits (CTMUICON<7:2>).
Configure the edge input sources for Edge 1 and
Edge 2 by setting the EDG1SEL and EDG2SEL
bits (CTMUCONL<3:2 and 6:5>).
Configure the input polarities for the edge inputs
using the EDG1POL and EDG2POL bits
(CTMUCONL<4,7>). The default configuration
is for negative edge polarity (high-to-low
transitions).
Enable edge sequencing using the EDGSEQEN
bit
sequencing is disabled.
Select the operating mode (Measurement or
Time Delay) with the TGEN bit. The default
mode is Time/Capacitance Measurement.
Discharge the connected circuit by setting the
IDISSEN bit (CTMUCONH<1>); after waiting a
sufficient time for the circuit to discharge, clear
IDISSEN.
Disable the module by clearing the CTMUEN bit
(CTMUCONH<7>).
Enable the module by setting the CTMUEN bit.
EDG1STAT (CTMUCONL<1:0>).
bit (CTMUCONH<3>).
CTMU Module Initialization
(CTMUCONH<2>).
By
DS41412D-page 319
default,
edge