PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 129

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

REGISTER 9-16:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
SSP2IP
R/W-0
SSP2IP: Synchronous Serial Port 2 Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP: Bus Collision 2 Interrupt Priority bit
1 = High priority
0 = Low priority
RC2IP: EUSART2 Receive Interrupt Priority bit
1 = High priority
0 = Low priority
TX2IP: EUSART2 Transmit Interrupt Priority bit
1 = High priority
0 = Low priority
CTMUIP: CTMU Interrupt Priority bit
1 = High priority
0 = Low priority
TMR5GIP: TMR5 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3GIP: TMR3 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
TMR1GIP: TMR1 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
BCL2IP
R/W-0
IPR3: PERIPHERAL INTERRUPT PRIORITY REGISTER 3
W = Writable bit
‘1’ = Bit is set
RC2IP
R/W-0
R/W-0
TX2IP
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
CTMUIP
R/W-0
PIC18(L)F2X/4XK22
TMR5GIP
R/W-0
x = Bit is unknown
TMR3GIP
R/W-0
DS41412D-page 129
TMR1GIP
R/W-0
bit 0