PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 450

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

PIC18(L)F2X/4XK22
TABLE 27-13: EXAMPLE SPI MODE REQUIREMENTS (MASTER MODE, CKE = 0 OR 1)
FIGURE 27-12:
DS41412D-page 450
Param.
70
73
74
75
76
78
79
80
81
No.
Note:
(CKP = 0)
(CKP = 1)
SDI
SCK
SDO
SS
SCK
TssL2scH,
TssL2scL
TdiV2scH,
TdiV2scL
TscH2diL,
TscL2diL
TdoR
TdoF
TscR
TscF
TscH2doV,
TscL2doV
TdoV2scH,
TdoV2scL
Symbol
Refer to
Figure 27-4
EXAMPLE SPI MASTER MODE TIMING (CKE = 1)
SS  to SCK  or SCK  Input
Setup Time of SDI Data Input to SCK Edge
Hold Time of SDI Data Input to SCK Edge
SDO Data Output Rise Time
SDO Data Output Fall Time
SCK Output Rise Time
(Master mode)
SCK Output Fall Time (Master mode)
SDO Data Output Valid after SCK Edge
SDO Data Output Setup to SCK Edge
81
73
MSb In
MSb
for load conditions.
74
71
Characteristic
75, 76
80
72
bit 6 - - - - - -1
bit 6 - - - -1
Preliminary
LSb In
LSb
Min
T
T
25
25
—
—
—
—
—
CY
CY
79
78
 2010 Microchip Technology Inc.
Max Units
30
20
30
20
20
—
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions