PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 128

64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE

PIC18F46K22-I/MV

Manufacturer Part Number
PIC18F46K22-I/MV
Description
64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F46K22-I/MV

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 30x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-UFQFN Exposed Pad
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
4 KB
Number Of Programmable I/os
36
Number Of Timers
3 x 8-bit. 4 x 16-bit
Operating Supply Voltage
1.8 V to 5.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
PIC18(L)F2X/4XK22
REGISTER 9-15:
DS41412D-page 128
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
OSCFIP
R/W-1
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
C1IP: Comparator C1 Interrupt Priority bit
1 = High priority
0 = Low priority
C2IP: Comparator C2 Interrupt Priority bit
1 = High priority
0 = Low priority
EEIP: Data EEPROM/Flash Write Operation Interrupt Priority bit
1 = High priority
0 = Low priority
BCL1IP: MSSP1 Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
HLVDIP: Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
CCP2IP: CCP2 Interrupt Priority bit
1 = High priority
0 = Low priority
R/W-1
C1IP
IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-1
C2IP
R/W-1
EEIP
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
BCL1IP
R/W-1
HLVDIP
R/W-1
 2010 Microchip Technology Inc.
x = Bit is unknown
TMR3IP
R/W-1
CCP2IP
R/W-1
bit 0

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