PIC18F46K22-I/MV Microchip Technology, PIC18F46K22-I/MV Datasheet - Page 485

• Manufacturer Part Number: PIC18F46K22-I/MV
• Description: 64KB, Flash, 3968bytes-RAM,8-bit Family,nanoWatt XLP 40 UQFN 5x5x0.5mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F46K22-I/MV

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 3.8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 30x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-UFQFN Exposed Pad
• Processor Series: PIC18F
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Number Of Programmable I/os: 36
• Number Of Timers: 3 x 8-bit. 4 x 16-bit
• Operating Supply Voltage: 1.8 V to 5.5 V
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Customer Change Notification Service ............................ 493
Customer Notification Service .......................................... 493
Customer Support ............................................................ 493
CV
D
Data Addressing Modes ..................................................... 90
Data EEPROM
Data EEPROM Memory
Data Memory ..................................................................... 76
DAW ................................................................................. 386
DC and AC Characteristics
DC Characteristics
DCFSNZ .......................................................................... 387
DECF ............................................................................... 386
DECFSZ ........................................................................... 387
Development Support ...................................................... 417
Device Differences ........................................................... 482
Device Overview
Device Reset Timers .......................................................... 63
 2010 Microchip Technology Inc.
REF
Measuring Time with ................................................ 327
Operation ................................................................. 318
Operation During Idle Mode ..................................... 328
Operation During Sleep Mode ................................. 328
Comparing Addressing Modes with the Extended In-
Direct .......................................................................... 90
Indexed Literal Offset ................................................. 92
Indirect ....................................................................... 90
Inherent and Literal .................................................... 90
Code Protection ....................................................... 365
Associated Registers ............................................... 109
EEADR and EEADRH Registers ............................. 105
EECON1 and EECON2 Registers ........................... 105
Operation During Code-Protect ............................... 108
Protection Against Spurious Write ........................... 108
Reading .................................................................... 107
Using ........................................................................ 108
Write Verify .............................................................. 107
Writing ...................................................................... 107
Access Bank .............................................................. 82
and the Extended Instruction Set ............................... 92
Bank Select Register (BSR) ....................................... 76
General Purpose Registers ........................................ 82
Map for PIC18F/LF23K22 and PIC18F/LF43K22 Devic-
Map for PIC18F/LF24K22 and PIC18F/LF44K22 Devic-
Special Function Registers ........................................ 82
Graphs and Tables .................................................. 461
Input/Output ............................................................. 436
Power-Down Current ............................................... 424
Primary Idle Supply Current ..................................... 433
Primary Run Supply Current .................................... 431
RC Idle Supply Current ............................................ 429
RC Run Supply Current ........................................... 427
Secondary Oscillator Supply Current ....................... 434
Supply Voltage ......................................................... 423
Details on Individual Family Members ....................... 14
Features (table) .......................................................... 15
New Core Features .................................................... 13
Other Special Features .............................................. 14
PLL Lock Time-out ..................................................... 63
Power-up Timer (PWRT) ........................................... 63
Time-out Sequence .................................................... 63
Voltage Reference Specifications ........................ 439
struction Set Enabled ......................................... 93
Instructions Affected .......................................... 92
es ....................................................................... 77
es ....................................................................... 78
Preliminary
DEVID1 Register ............................................................. 358
DEVID2 Register ............................................................. 358
Digital-to-Analog Converter (DAC) .................................. 339
Direct Addressing .............................................................. 91
E
ECCP/CCP. See Enhanced Capture/Compare/PWM
ECCPxAS Register .......................................................... 205
EECON1 Register ...................................................... 97, 106
Effect on Standard PIC Instructions ................................. 414
Effects of Power Managed Modes on Various Clock Sources
Effects of Reset
Electrical Characteristics ................................................. 421
Enhanced Capture/Compare/PWM (ECCP) .................... 177
Enhanced Universal Synchronous Asynchronous Receiver
Errata ................................................................................. 12
EUSART .......................................................................... 263
PIC18(L)F2X/4XK22
Associated Registers ............................................... 342
Effects of a Reset .................................................... 340
40
PWM mode .............................................................. 186
Enhanced PWM Mode ............................................. 188
Transmitter (EUSART) ............................................ 263
Asynchronous Mode ................................................ 265
Baud Rate Generator (BRG)
Clock polarity
Data polarity
Interrupts
Synchronous Master Mode .............................. 283, 288
Auto-Restart .................................................... 196
Auto-shutdown ................................................ 195
Direction Change in Full-Bridge Output Mode . 194
Full-Bridge Application ..................................... 192
Full-Bridge Mode ............................................. 192
Half-Bridge Application .................................... 191
Half-Bridge Application Examples ................... 197
Half-Bridge Mode ............................................. 191
Output Relationships (Active-High and Active-Low)
Output Relationships Diagram ......................... 190
Programmable Dead Band Delay .................... 197
Shoot-through Current ..................................... 197
Start-up Considerations ................................... 199
12-bit Break Transmit and Receive ................. 282
Associated Registers, Receive ........................ 271
Associated Registers, Transmit ....................... 267
Auto-Wake-up on Break .................................. 280
Baud Rate Generator (BRG) ........................... 275
Clock Accuracy ................................................ 272
Receiver .......................................................... 268
Setting up 9-bit Mode with Address Detect ..... 270
Transmitter ...................................................... 265
Associated Registers ....................................... 276
Auto Baud Rate Detect .................................... 279
Baud Rate Error, Calculating ........................... 275
Baud Rates, Asynchronous Modes ................. 276
Formulas .......................................................... 275
High Baud Rate Select (BRGH Bit) ................. 275
Synchronous Mode .......................................... 283
Asynchronous Receive .................................... 268
Asynchronous Transmit ................................... 265
Synchronous Mode .......................................... 283
Asychronous Receive ...................................... 269
Asynchronous Receive .................................... 269
Asynchronous Transmit ................................... 265
Associated Registers, Receive ........................ 287
................................................................. 189
DS41412D-page 485