EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 351

BOARD EVAL FOR MC9S12XEP100

EVB9S12XEP100

Manufacturer Part Number
EVB9S12XEP100
Description
BOARD EVAL FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of EVB9S12XEP100

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The meaning of the security bits SEC[1:0] is shown in
security is controlled by two bits. To put the device in unsecured mode, these bits must be programmed to
SEC[1:0] = ‘10’. All other combinations put the device in a secured mode. The recommended value to put
the device in secured state is the inverse of the unsecured state, i.e. SEC[1:0] = ‘01’.
9.1.4
By securing the device, unauthorized access to the EEPROM and Flash memory contents can be prevented.
However, it must be understood that the security of the EEPROM and Flash memory contents also depends
on the design of the application program. For example, if the application has the capability of downloading
code through a serial port and then executing that code (e.g. an application containing bootloader code),
then this capability could potentially be used to read the EEPROM and Flash memory contents even when
the microcontroller is in the secure state. In this example, the security of the application could be enhanced
by requiring a challenge/response authentication before any code can be downloaded.
Secured operation has the following effects on the microcontroller:
9.1.4.1
Freescale Semiconductor
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Background debug module (BDM) operation is completely disabled.
Execution of Flash and EEPROM commands is restricted. Please refer to the NVM block guide for
details.
Tracing code execution using the DBG module is disabled.
Debugging XGATE code (breakpoints, single-stepping) is disabled.
Operation of the Secured Microcontroller
Normal Single Chip Mode (NS)
Please refer to the Flash block guide for actual security configuration (in
section “Flash Module Security”).
KEYEN[1:0]
Table 9-3. Backdoor Key Access Enable Bits
SEC[1:0]
MC9S12XE-Family Reference Manual Rev. 1.23
00
01
10
11
00
01
10
11
Table 9-4. Security Bits
NOTE
Table
Access Enabled
Security State
0 (unsecured)
Backdoor Key
1 (secured)
1 (secured)
1 (secured)
0 (disabled)
0 (disabled)
0 (disabled)
1 (enabled)
9-4. For security reasons, the state of device
Chapter 9 Security (S12XE9SECV2)
351

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