EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 452

BOARD EVAL FOR MC9S12XEP100

EVB9S12XEP100

Manufacturer Part Number
EVB9S12XEP100
Description
BOARD EVAL FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of EVB9S12XEP100

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 10 XGATE (S12XGATEV3)
SSEM
Operation
Attempts to set a semaphore. The state of the semaphore will be stored in the Carry-Flag:
In monadic address mode, bits RS[2:0] select the semaphore to be set.
CCR Effects
Code and CPU Cycles
452
N:
Z:
V:
C:
SSEM #IMM3
SSEM RS
N
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Not affected.
Not affected.
Not affected.
Set if semaphore is locked by the RISC core; cleared otherwise.
Z
1 = Semaphore is locked by the RISC core
0 = Semaphore is locked by the S12X_CPU
V
Source Form
C
MC9S12XE-Family Reference Manual , Rev. 1.23
Address
Mode
IMM3
MON
Set Semaphore
0
0
0
0
0
0
0
0
0
0
IMM3
Machine Code
RS
1
1
1
1
1
1
1
1
0
0
SSEM
Freescale Semiconductor
0
0
1
1
0
1
Cycles
PA
PA

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