EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 476

• Manufacturer Part Number: EVB9S12XEP100
• Description: BOARD EVAL FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of EVB9S12XEP100

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 11 S12XE Clocks and Reset Generator (S12XECRGV1)
11.3.2.2
The REFDV register provides a finer granularity for the IPLL multiplier steps.
Read: Anytime
Write: Anytime except when PLLSEL = 1
The REFFRQ[1:0] bit are used to configure the internal PLL filter for optimal stability and lock time. For
correct IPLL operation the REFFRQ[1:0] bits have to be selected according to the actual REFCLK
frequency as shown in
IPLL (no locking and/or insufficient stability).
11.3.2.3
The POSTDIV register controls the frequency ratio between the VCOCLK and PLLCLK. The count in the
final divider divides VCOCLK frequency by 1 or 2*POSTDIV. Note that if POSTDIV = $00 f
(divide by one).
476
Module Base + 0x0001
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
Reset
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
W
R
f REF
S12XECRG Reference Divider Register (REFDV)
S12XECRG Post Divider Register (POSTDIV)
0
7
=
REFFRQ[1:0]
Write to this register initializes the lock detector bit.
------------------------------------
(
REFDIV
f OSC
Figure 11-4. S12XECRG Reference Divider Register (REFDV)
Figure
0
+
6
1
Table 11-3. Reference Clock Frequency Selection
)
11-3. Setting the REFFRQ[1:0] bits wrong can result in a non functional
REFCLK Frequency Ranges
MC9S12XE-Family Reference Manual , Rev. 1.23
1MHz <= f
6MHz < f
2MHz < f
5
0
f
REF
REF
REF
>12MHz
REF
<= 12MHz
<= 6MHz
<= 2MHz
NOTE
0
4
0
3
REFFRQ[1:0]
REFDIV[5:0]
00
01
10
11
2
0
Freescale Semiconductor
0
1
PLL
= f
0
0
VCO