EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 83

• Manufacturer Part Number: EVB9S12XEP100
• Description: BOARD EVAL FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of EVB9S12XEP100

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Vector Address
Freescale Semiconductor
Vector base + $8A
Vector base + $7E
Vector base + $7C
Vector base + $7A
Vector base + $6E
Vector base + $6C
Vector base + $6A
Vector base + $5E
Vector base + $5C
Vector base + $5A
Vector base + $88
Vector base + $86
Vector base + $84
Vector base + $82
Vector base + $80
Vector base + $78
Vector base + $76
Vector base + $74
Vector base + $72
Vector base + $70
Vector base + $68
Vector base + $66
Vector base + $64
Vector base + $62
Vector base + $60
Vector base + $58
Vector base + $56
Vector base + $54
Vector base + $52
Vector base + $50
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
(1)
Channel
XGATE
ID
$3D
$3C
$2D
$2C
$3F
$3B
$3A
$2F
$2E
$2B
$2A
$45
$44
$43
$42
$41
$40
$39
$38
$37
$36
$35
$34
$33
$32
$29
$28
—
(2)
Table 1-14. Interrupt Vector Locations (Sheet 3 of 4)
Autonomous periodical interrupt (API)
Periodic interrupt timer channel 0
Periodic interrupt timer channel 1
Periodic interrupt timer channel 2
Periodic interrupt timer channel 3
Periodic interrupt timer channel 4
Periodic interrupt timer channel 5
Periodic interrupt timer channel 6
Periodic interrupt timer channel 7
MC9S12XE-Family Reference Manual Rev. 1.23
High Temperature Interrupt
Low-voltage interrupt (LVI)
XGATE software trigger 0
XGATE software trigger 1
XGATE software trigger 2
XGATE software trigger 3
XGATE software trigger 4
XGATE software trigger 5
XGATE software trigger 6
XGATE software trigger 7
TIM timer channel 0
TIM timer channel 1
TIM timer channel 2
Interrupt Source
IIC1 Bus
SCI2
SCI3
SCI4
SCI5
SCI7
Reserved
Reserved
Mask
CCR
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
I bit
VREGAPICTRL (APIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
(TIE, TCIE, RIE, ILIE)
Chapter 1 Device Overview MC9S12XE-Family
VREGHTCL (HTIE)
VREGCTRL (LVIE)
PITINTE (PINTE0)
PITINTE (PINTE1)
PITINTE (PINTE2)
PITINTE (PINTE3)
PITINTE (PINTE4)
PITINTE (PINTE5)
PITINTE (PINTE6)
PITINTE (PINTE7)
XGMCTL (XGIE)
XGMCTL (XGIE)
XGMCTL (XGIE)
XGMCTL (XGIE)
XGMCTL (XGIE)
XGMCTL (XGIE)
XGMCTL (XGIE)
XGMCTL (XGIE)
Local Enable
IBCR (IBIE)
SCI2CR2
SCI3CR2
SCI4CR2
SCI5CR2
SCI7CR2
TIE (C0I)
TIE (C1I)
TIE (C2I)
Wake up
STOP
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Wake up
WAIT
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
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