EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 431

• Manufacturer Part Number: EVB9S12XEP100
• Description: BOARD EVAL FOR MC9S12XEP100
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of EVB9S12XEP100

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: MC9S12XEP100
• Data Bus Width: 16 bit
• Interface Type: RS-232
• Silicon Manufacturer: Freescale
• Core Architecture: S12
• Core Sub-architecture: S12
• Silicon Core Number: MC9S12
• Silicon Family Name: S12XE
• Rohs Compliant: Yes
• For Use With/related Products: MC9S12XEP100
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CSR
Operation
n = RS or IMM4
Shifts the bits in register RD n positions to the right. The higher n bits of the register RD become filled
with the carry flag. The carry flag will be updated to the bit contained in RD[n-1] before the shift for n > 0.
n can range from 0 to 16.
In immediate address mode, n is determined by the operand IMM4. n is considered to be 16 if IMM4 is
equal to 0.
In dyadic address mode, n is determined by the content of RS. n is considered to be 16 if the content of RS
is greater than 15.
CCR Effects
Code and CPU Cycles
Freescale Semiconductor
N:
Z:
V:
C:
CSR RD, #IMM4
CSR RD, RS
N
∆
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Set if bit 15 of the result is set; cleared otherwise.
Set if the result is $0000; cleared otherwise.
Set if a two´s complement overflow resulted from the operation; cleared otherwise.
RD[15]
Set if n > 0 and RD[n-1] = 1; if n = 0 unaffected.
Z
∆
old
V
∆
Source Form
^ RD[15]
C
∆
new
C
C
n bits
MC9S12XE-Family Reference Manual Rev. 1.23
C
Logical Shift Right with Carry
Address
Mode
IMM4
C
DYA
0
0
0
0
0
0
0
0
RD
n
1
1
Machine Code
RD
RD
RS
IMM4
C
Chapter 10 XGATE (S12XGATEV3)
1
1
0
0
0
CSR
1
1
1
1
Cycles
P
P
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