EVB9S12XEP100 Freescale Semiconductor, EVB9S12XEP100 Datasheet - Page 436

BOARD EVAL FOR MC9S12XEP100

EVB9S12XEP100

Manufacturer Part Number
EVB9S12XEP100
Description
BOARD EVAL FOR MC9S12XEP100
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheet

Specifications of EVB9S12XEP100

Contents
Module and Misc Hardware
Processor To Be Evaluated
MC9S12XEP100
Data Bus Width
16 bit
Interface Type
RS-232
Silicon Manufacturer
Freescale
Core Architecture
S12
Core Sub-architecture
S12
Silicon Core Number
MC9S12
Silicon Family Name
S12XE
Rohs Compliant
Yes
For Use With/related Products
MC9S12XEP100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Chapter 10 XGATE (S12XGATEV3)
LDW
Operation
M[RB, #OFFS5] ⇒ RD
M[RB, RI]
M[RB, RI]
RI-2
IMM16
Loads a 16 bit value into the register RD.
CCR Effects
Code and CPU Cycles
1. If the same general purpose register is used as index (RI) and destination register (RD), the content of the register will not be
436
N:
Z:
V:
C:
LDW RD, (RB, #OFFS5)
LDW RD, (RB, RI)
LDW RD, (RB, RI+)
LDW RD, (RB, -RI)
LDW RD, #IMM16
N
Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers
incremented after the data move: M[RB, RI] ⇒ RD
indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010
Not affected.
Not affected.
Not affected.
Not affected.
Z
V
Source Form
C
⇒ RD
⇒ RD;
⇒ RI;
⇒ RD (translates to LDL RD, #IMM16[7:0]; LDH RD, #IMM16[15:8])
RI+2
M[RS, RI] ⇒ RD
MC9S12XE-Family Reference Manual , Rev. 1.23
Address
Mode
IMM8
IMM8
IDO5
IDR+
-IDR
IDR
Load Word from Memory
⇒ RI
0
0
0
0
1
1
1
1
1
1
1
1
1
0
1
1
1
1
1
0
0
0
0
1
1
1
1
1
1
0
1
Machine Code
RD
RD
RD
RD
RD
RD
RB
RB
RB
RB
IMM16[15:8]
IMM16[7:0]
RI
RI
RI
Freescale Semiconductor
OFFS5
LDW
0
0
1
0
1
0
Cycles
PR
PR
PR
PR
P
P

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