ADUC847BCPZ8-5 Analog Devices Inc, ADUC847BCPZ8-5 Datasheet - Page 24

• Manufacturer Part Number: ADUC847BCPZ8-5
• Description: IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC847BCPZ8-5

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 10x24b; D/A 1x12b, 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC847QSZ - KIT DEV QUICK START FOR ADUC847
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC845/ADuC847/ADuC848
SPECIAL FUNCTION REGIST
The SFR space is mapped into the upper 128 bytes of internal
data memory space and accessed by direct addre
provides an inte face betwee
erals. A block diagra show
ADuC845/ADuC8
Figure 11.
All registers except the program counter (PC) and t
general- rpose re ster banks resi
reg
provide an interface b
Accumulator SFR (ACC)
ACC is the accumulator register, which is used for math opera-
tions including addition, subtraction, integer multiplication and
division, and Boolean bit manipulations. The mnemonics for
accumulator-specific instructions usually refer to the
accumulator as A.
B SFR (B)
The B register is used with the accumulator for multiplication
and division operations. For other instructions, it can be treated
as a general-purpose scratch pad register.
isters in
FLASH/EE PROGRAM
REPROGRAMMABLE
256 BYTES RAM
2kBYTES XRAM
ELECTRICALLY
COMPATIBLE
NONVOLATILE
62-kBYTE
MEMORY
pu
CORE
8051-
clude co rol, configuration, and dat
r
47/
gi
Figure 11. Programming Model
nt
m
etween the CPU and all on-chip periph
ADu
FUNCTION
REGISTER
128-BYTE
SPECIAL
AREA
C848 via the SFR area is shown in
ing the programming model of the
n the CPU and all on-chip periph-
ERS (SFRs)
de in the SFR area. The SFR
REPROGRAMMABLE
CURRENT SOU
FLASH/EE DATA
OTHER ON-CHIP
ELECTRICALLY
TEMPERATURE
NONVOLATILE
PERIPHERALS
12-BIT DAC
SERIAL I/O
MEMORY
4-kBYTE
SENSOR
Σ-∆ ADC
a registers that
PWM
WDT
PSM
ssing only. It
TIC
he four
RCES
erals.
Rev. B | Page 24 of 108
Data Pointer (DPTR)
The data pointer is made up o
byte), DPH (high byte), and DPL (low byte). These provide
memory addresses for internal code and data memory access.
The DPTR can be manipulated as a 16-bit register (DPTR =
DPH, DPL), although INC DPTR instructions automatically
carry over to DPP, or as three independent 8-bit registers (D
DPH, DPL).
The ADuC845/ADu 847/ADu
pointers. See the D
Stack Pointer (SP and SPH)
The SP SFR is the stack pointer, which is used to hold an
internal
is
executions. Although
RAM, the SP register i
causes the stack to beg
As mentioned earlier, t
po
po
en
othe
Pr
Th
status of the CPU as li
SFR Address:
Power-On Default:
Bit Addressable:
T
Bit No.
7
6
5
4, 3
2
1
0
able 5. PSW SFR Bit Designations
increme
ogram Status Word
inter. Th
inter are
able the
e PSW S
rwise,
RA
nted be
SPH
the SPH
Name
CY
AC
F0
RS1, RS0
OV
F1
P
e th
FR contai s several bits that reflect the current
the
M add
ree extr
three L
SFR, th
fore
ress
ual
SF
C
n
the stack can reside anywhere in on-chip
sted in Table 5.
data is stored during P
s initialized to 07H after a reset. T
R can be neither written to nor read fr
SBs of the SPH byte located at B7H. T
Data
in at location 08H.
a bits needed to make up the 11-bit s
called the top
he parts offer an exten
D0H
00H
Yes
Description
Carry Flag.
Auxiliary Carry Flag.
General-Purpose Flag.
Register Bank Select Bits.
RS1
0
0
1
1
Overflow Flag.
General-Purpose Flag.
Parity Bit.
e EXSP (CFG84x.7) bit must be set;
(PSW)
Pointers section.
f three 8-bit registers: DPP (page
RS0
0
1
0
1
C848 support dual data
of the stack. The SP register
Selected Bank
0
1
2
3
USH and CALL
ded 11-bit stack
his
tack
o
PP,
om.