ADUC847BCPZ8-5 Analog Devices Inc, ADUC847BCPZ8-5 Datasheet - Page 82

• Manufacturer Part Number: ADUC847BCPZ8-5
• Description: IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC847BCPZ8-5

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 10x24b; D/A 1x12b, 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC847QSZ - KIT DEV QUICK START FOR ADUC847
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC845/ADuC847/ADuC848
Mode 3 (9-Bit UART with Variable Baud Rate)
Mode 3 is selected by setting both SM0 and SM1. In this mode,
the 8051 UART serial port operates in 9-bit mode with a variable
baud rate determined by either Timer 1 or Timer 2. The opera-
tion of the 9-bit UART is the same as for Mode 2, but the baud
rate can be varied as for Mode 1.
In all four modes, transmission is initiated by any instruction
that uses SBUF as a destination register. Reception is initiated in
Mode 0 when RI = 0 and REN = 1. Reception is initiated in the
other modes by the incoming start bit if REN = 1.
UART Serial Port Baud Rate Generation
Mode 0 Baud Rate Generation
The baud rate in Mode 0 is fixed:
Mode 2 Baud Rate Generation
The baud rate in Mode 2 depends on the value of the SMOD bit
in the PCON SFR. If SMOD = 0, the baud rate is 1/32 of the
core clock. If SMOD = 1, the baud rate is 1/16 of the core clock:
Modes 1 and 3 Baud Rate Generation
The baud rates in Modes 1 and 3 are determined by the overflow
rate in Timer 1 or Timer 2, or in both (one for transmit and the
other for receive).
Timer 1 Generated Baud Rates
When Timer 1 is used as the baud rate generator, the baud rates
in Modes 1 and 3 are determined by the Timer 1 overflow rate
and the value of SMOD as follows:
Mode 0 Baud Rate =
Mode 2 Baud Rate =
Modes 1 and 3 Baud Rate =
⎛
⎜
⎝
2
TRANSITION
T2EX
NOTES
1. THE CORE CLOCK IS THE OUTPUT OF THE PLL (SEE THE ON-CHIP PLL SECTION)
DETECTOR
Core
SMOD
PIN
PIN
CORE
CLK
32
T2
1
2
Clock
SMOD
32
× Core Clock Frequency
12
Frequency
× Timer 1 Overflow Rate
C/ T2 = 0
C/ T2 = 1
EXEN2
⎞
⎟
⎠
CONTROL
CONTROL
TR2
Figure 60. Timer 2, UART Baud Rates
EXF 2
Rev. B | Page 82 of 108
RCAP2L
(8 BITS)
TL2
TIMER 2
INTERRUPT
RCAP2H
(8 BITS)
TH2
The Timer 1 interrupt should be disabled in this application.
The timer itself can be configured for either timer or counter
operation, and in any of its three running modes. In the most
typical application, it is configured for timer operation in
autoreload mode (high nibble of TMOD = 0010 binary). In that
case, the baud rate is given by the formula
Timer 2 Generated Baud Rates
Baud rates can also be generated by using Timer 2. Using Timer 2
is similar to using Timer 1 in that the timer must overflow 16
times before a bit is transmitted or received. Because Timer 2
has a 16-bit autoreload mode, a wider range of baud rates is
possible.
Therefore, when Timer 2 is used to generate baud rates, the
timer increments every two clock cycles rather than every core
machine cycle as before. It increments six times faster than
Timer 1, and, therefore, baud rates six times faster are possible.
Because Timer 2 has 16-bit autoreload capability, very low baud
rates are still possible.
Timer 2 is selected as the baud rate generator by setting the
TCLK and/or RCLK in T2CON. The baud rates for transmit
and receive can be simultaneously different. Setting RCLK
and/or TCLK puts Timer 2 into its baud rate generator mode as
shown in Figure 60.
In this case, the baud rate is given by the formula
RELOAD
OVERFLOW
TIMER 2
Modes 1 and 3 Baud Rate =
Modes 1 and 3 Baud Rate =
Modes 1 and 3 Baud Rate =
(
16
×
[
65536
Core
1
1
−
Clock
OVERFLOW
2
TIMER 1
0
(
RCAP
0
0
1
Frequency
2
RCLK
TCLK
H
16
16
:
SMOD
RCAP
2
RX
CLOCK
TX
CLOCK
16
1
SMOD
32
2
L
× Timer 2 Overflow Rate
)
]
)
×
Core
Clock
(
256
−
Frequency
TH1
)