ADUC847BCPZ8-5 Analog Devices Inc, ADUC847BCPZ8-5 Datasheet - Page 52

• Manufacturer Part Number: ADUC847BCPZ8-5
• Description: IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC847BCPZ8-5

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 10x24b; D/A 1x12b, 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC847QSZ - KIT DEV QUICK START FOR ADUC847
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC845/ADuC847/ADuC848
Example: Programming the Flash/EE Data Memory
A user wants to program F3H into the second byte on Page 03H
of the Flash/EE data memory space while preserving the other
3 bytes already in this page. A typical program of the Flash/EE
data array involves
1.
2.
3.
Step 1: Set Up the Page Address
Address registers EADRH and EADRL hold the high byte
address and the low byte address of the page to be addressed.
The assembly language to set up the address may appear as
MOV EADRH, #0
MOV EADRL, #03H
Step 2: Set Up the EDATA Registers
Write the four values to be written into the page into the four
SFRs EDATA1–4. Unfortunately, the user does not know three
of them. Thus, the user must read the current page and overwrite
the second byte.
MOV ECON,
MOV EDATA2, #0F3H ;Overwrite Byte 2
Step 3: Program Page
A byte in the Flash/EE array can be programmed only if it has
previously been erased. Specifically, a byte can be programmed
only if it already holds the value FFH. Because of the Flash/EE
architecture, this erasure must happen at a page level; therefore,
a minimum of 4 bytes (1 page) are erased when an erase
command is initiated. Once the page is erased, the user can
program the 4 bytes in-page and then perform a verification of
the data.
MOV ECON, #5
MOV ECON, #2
MOV ECON, #4
MOV A, ECON
Although the 4 kbytes of Flash/EE data memory are factory pre-
erased, that is, byte locations set to FFH, it is good
programming practice to include an ERASEALL routine as part
of any configuration/set-up code running on the parts. An
ERASEALL command consists of writing 06H to the ECON
SFR, which initiates an erase of the 4-kbyte Flash/EE array. This
command coded in 8051 assembly language would appear as
MOV ECON, #06H
Setting EADRH/L with the page address.
Writing the data to be programmed to the EDATA1–4.
Writing the ECON SFR with the appropriate command.
#1
;ERASE Page
;WRITE Page
;VERIFY Page
;Check if ECON = 0 (OK!)
;Set Page Address Pointer
;Read Page into EDATA1-4
;ERASE all Command
;2ms duration
Rev. B | Page 52 of 108
FLASH/EE MEMORY TIMING
Typical program and erase times for the parts are as follows:
Normal Mode (Operating on Flash/EE Data Memory)
Command
READPAGE
WRITEPAGE
VERIFYPAGE
ERASEPAGE
ERASEALL
READBYTE
WRITEBYTE
ULOAD Mode (Operating on Flash/EE Program Memory)
WRITEPAGE
ERASEPAGE
ERASEALL
WRITEBYTE
A given mode of operation is initiated as soon as the command
word is written to the ECON SFR. The core microcontroller
operation is idled until the requested program/read or erase
mode is completed. In practice, this means that even though the
Flash/EE memory mode of operation is typically initiated with a
two-machine-cycle MOV instruction (to write to the ECON
SFR), the next instruction is not executed until the Flash/EE
operation is complete. This means that the core cannot respond
to interrupt requests until the Flash/EE operation is complete,
although the core peripheral functions such as counter/timers
continue to count as configured throughout this period.
256 bytes
64 bytes
56 kbytes
1 byte
Bytes Affected
4 bytes
4 bytes
4 bytes
4 bytes
4 kbytes
1 byte
1 byte
25 machine cycles
380 µs
25 machine cycles
2 ms
2 ms
10 machine cycles
200 µs
15 ms
2 ms
2 ms
200 µs