ADUC847BCPZ8-5 Analog Devices Inc, ADUC847BCPZ8-5 Datasheet - Page 46

IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC

ADUC847BCPZ8-5

Manufacturer Part Number
ADUC847BCPZ8-5
Description
IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC847BCPZ8-5

Core Processor
8052
Core Size
8-Bit
Speed
12.58MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
POR, PSM, PWM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 10x24b; D/A 1x12b, 2x16b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
56-LFCSP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-ADUC847QSZ - KIT DEV QUICK START FOR ADUC847
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
ADuC845/ADuC847/ADuC848
SF (ADC SINC FILTER CONTROL REGISTER)
The SF register is used to configure the decimation factor fo
SFR Address:
Power-On Default:
Bit Addressable:
Table 28. Sinc Filter
SF.7
0
The bits in this register set the decimation factor of the ADC. This has a d
chop setting. The equations used to determine the ADC throughput rate a
Fadc (Chop On
where SFword is in decimal.
Fadc (Chop Off) =
where SFword is in decimal.
Table 29. SF SFR Bit Examples
Chop Enabled (ADCMODE.3 = 0)
SF (Decimal)
13
69
82
255
Chop Disabled (ADCMODE.3 = 1)
SF (Decimal)
3
69
82
255
1
During ADC calibration, the user-programmed value of SF wor
did on previou
With chop enabled, if an SF word smaller than 13 is written to this SF reg
1
s MicroConverter® products. However, for optimum calibrat
) =
SF (Hexadecimal)
0D
45
52
FF
SF (Hexadecimal)
03
45
52
FF
SF.6
1
3
8
× 8
×
SFR Bit Designations
SFword
D4H
45H
No
×
1
SFword
1
× 32.768 kHz
× 32.768 kHz
SF.5
0
Fadc (Hz)
105.3
19.79
16.65
5.35
Fadc (Hz)
1365.3
59.36
49.95
16.06
Tadc (ms)
9.52
50.53
60.06
Tadc (ms)
0.73
16.84
20.02
186.77
62.25
SF.4
0
r the ADC, an
Rev. B | Page 46 of 108
ister, the filter au
Tsettle (ms)
19.04
101.1
120.1
373.54
Tsettle (ms)
2.2
50.52
60.06
186.8
d is used.
SF.
0
ion results, it is recommended that the maximum SF word be se
3
The SF word does not default to the maximum setting (255) as it
irect bearing on the throughput rate of the ADC along with the
d therefore, has a direct influence on the ADC throughput rate.
re
tomatically defaults to 13.
SF.2
1
0
SF.1
SF.0
1
t.

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