ADUC847BCPZ8-5 Analog Devices Inc, ADUC847BCPZ8-5 Datasheet - Page 41

• Manufacturer Part Number: ADUC847BCPZ8-5
• Description: IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC847BCPZ8-5

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 10x24b; D/A 1x12b, 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC847QSZ - KIT DEV QUICK START FOR ADUC847
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADCMODE (ADC MODE REGISTER)
Used to control the operational mode of both ADCs.
SFR Address:
Power-On Default:
Bit Addressable:
Table 24. ADCMODE SFR Bit Designations
Bit No.
7
6
5
4
3
2, 1, 0
N
–
REJ60
ADC0EN
ADC1EN
(A
CHOP
MD2, MD1, MD0
––
ame
DuC845 only)
D1H
08H
No
Description
Not Implemented. Write D
Automatic 60
Se
re
fil
Pr
Set by the user to enable th
Cleared by the user to place the primary ADC into power-down mode.
Auxiliary (ADuC845 only) ADC Enable.
Set by the user to enable the auxilia
below.
Cleared by the user to place the auxiliary (ADuC845 only) ADC in power-down mode.
Chop M
Se
th
1.
C
Primar
Th
MD2
0
0
0
0
1
1
1
1
leared
ter n
3 kHz ADC upda
jection at an SF word of 82 d
imar
ree times higher ADC data t
tting
t b
ese
y the user to
bits
otc
y A
y an
M
0
0
1
1
0
0
1
1
th
ode Disable.
by
h must be ≤60 Hz. Th
DC Enable.
D1
is bit places a notch
select the operation
d Auxili
the use
Hz Notch Select
MD0
0
1
0
1
0
1
0
1
dis
te r
ary (
r to
ab
ates.
enable
ADuC8
ADC Power-Down Mode (Power-On Default).
Idle Mo
although the modulator clocks are still provided.
Single Conversion Mode. In single conversion mode, a single conversion is performed
on the enabled ADC. Upon completion of a conversion, the ADC data registers
(ADC0H/M/L and/or ADC1H/M/L (ADuC845 only)) are updated. The relevant flags in
the ADCSTAT SFR are written, and power-down is re-entered with the MD2−MD0
accordingly being written to 000.
Note that ADC0L is not available on the ADuC848.
Continuous Conversion. In continuous conversion mode, the ADC data registers are
regularly updated at the selected update rate (see the Sinc Filter SFR Bit Designations
in Table 28).
Internal Zero-Scale Calibration. Internal short automatically connected to the
enabled ADC input(s).
Internal Full-Scale Calibration. Internal or external REFIN± or REFIN2± V
determined by XREF bits in ADC0CON2 and/or AXREF (ADuC845 only) in ADC1CON
(ADuC845 only) is automatically connected to the enabled ADC input(s) for this
calibration.
System Zero-Scale Calibration. User should connect system zero-scale input to the
enabled ADC input(s) as selected by CH3–CH0 and ACH3–ACH0 bits in the
ADC0CON2 and ADC1CON (ADuC845 only) registers.
System Full-Scale Calibration. User should connect system full-scale input to the
enabled ADC input(s) as selected by CH3–CH0 and ACH3–ACH0 bits in the
ADC0CON2 and ADC1CON (ADuC845 only) registers.
le cho
on’t Care.
e primary ADC and place it in the mode selected in MD2–MD0 below.
Rev. B | Page 41 of 108
p mode on both the primary and auxiliary
45 only) ADC Mode Bits.
hroughput. SF values as low as 3 are allow
chop mode on both the primary and auxil
in the frequency response at 60 H
Bit.
ecimal. Thi
de. In idle mode, the ADC filter and mo
is second notch
al mode of the enabled ADC as follows:
ry (ADuC845 only) ADC and place it in the mode selected in MD2–MD0
s 60 Hz notch can be set only if SF ≥68 decimal, that is, the regular
is placed at 60 Hz only if the device clock is at 32.768 kHz.
ADuC845/ADuC847/ADuC848
z, allowing simultaneous 50 Hz and 60 Hz
dulator are held in a reset state
ed with this bit set, giving up to
(ADuC845 only) ADC a
iary (ADuC845 only) ADC.
REF
llowing a
(as