ADUC847BCPZ8-5 Analog Devices Inc, ADUC847BCPZ8-5 Datasheet - Page 74

• Manufacturer Part Number: ADUC847BCPZ8-5
• Description: IC,Data Acquisition CODEC,2-CHANNEL,LLCC,56PIN,PLASTIC
• Manufacturer: Analog Devices Inc
• Series: MicroConverter® ADuC8xxr

Specifications of ADUC847BCPZ8-5

• Core Processor: 8052
• Core Size: 8-Bit
• Speed: 12.58MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PSM, PWM, Temp Sensor, WDT
• Number Of I /o: 34
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 2.25K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 10x24b; D/A 1x12b, 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 56-LFCSP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-ADUC847QSZ - KIT DEV QUICK START FOR ADUC847
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

ADuC845/ADuC847/ADuC848
P2.5 and P2.6 can also be used as PWM outputs, while P2.7 can
act as an alternate PWM clock source. When selected as the
PWM outputs, they overwrite anything written to P2.5 or P2.6.
Table 47. Port 2 Alternate Functions
Pin No.
P2.0
P2.1
P2.2
P2.3
P2.4
P2.5
P2.6
P2.7
Port 3
Port 3 is a bidirectional port with internal pull-ups directly
controlled via the P3 SFR (B0H). Port 3 pins that have 1s
written to them are pulled high by the internal pull-ups and, in
that state, can be used as inputs. As inputs, Port 3 pins pulled
externally low source current because of the internal pull-ups.
Port 3 pins with 0s written to them drive a logic low output
voltage (V
have various secondary functions as described in Table 48. The
alternate functions of Port 3 pins can be activated only if the
corresponding bit latch in the P3 SFR contains a 1. Otherwise,
the port pin remains at 0.
Table 48. Port 3 Alternate Functions
Pin No.
P3.0
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
TO LATCH
INTERNAL
LATCH
WRITE
READ
READ
BUS
PIN
OL
Alternate Function
SCLOCK for SPI
MOSI for SPI
MISO for SPI
SS and T2 clock input
T2EX alternate control for T2
PWM0 output
PWM1 output
PWMCLK
Alternate Function
RxD (UART input pin, or serial data I/O in Mode 0)
TxD (UART output pin, or serial clock output in Mode 0)
INT0 (External Interrupt 0)
INT1 (External Interrupt 1)
T0 (Timer/Counter 0 external input)
T1 (Timer/Counter 1 external input)
WR (external data memory write strobe)
RD (external data memory read strobe)
) and are capable of sinking 4 mA. Port 3 pins also
Figure 50. Port 2 Bit Latch and I/O Buffer
LATCH
CL
D
Q
Q
ADDR
CONTROL
DV
DD
DV
DD
INTERNAL
PULL-UP
P2.x
PIN
Rev. B | Page 74 of 108
Read-Modify-Write Instructions
Some 8051 instructions read the latch while others read the pin.
The instructions that read the latch rather than the pins are the
ones that read a value, possibly change it, and rewrite it to the
latch. These are called read-modify-write instructions, which
are listed in Table 49. When the destination operand is a port or
a port bit, these instructions read the latch rather than the pin.
Table 49. Read-Modify-Write Instructions
Instruction
ANL
ORL
XRL
JBC
CPL
INC
DEC
DJNZ
MOV PX.Y, C
CLR PX.Y
SETB PX.Y
___________________________________________
1
Read-modify-write instructions are directed to the latch rather
than to the pin to avoid a possible misinterpretation of the
voltage level of a pin. For example, a port pin might be used to
drive the base of a transistor. When 1 is written to the bit, the
transistor is turned on. If the CPU reads the same port bit at the
pin rather than the latch, it reads the base voltage of the
transistor and interprets it as Logic 0. Reading the latch rather
than the pin returns the correct value of 1.
These instructions read the port byte (all 8 bits), modify the addressed bit,
and write the new byte back to the latch.
INTERNAL
TO LATCH
LATCH
1
WRITE
READ
READ
1
BUS
PIN
1
Figure 51. Port 3 Bit Latch and I/O Buffer
Description
Logical AND, for example, ANL P1, A
Logical OR, for example, ORL P2, A
Logical EX-OR, for example, XRL P3, A
Jump if Bit = 1 and clear bit, for example, JBC
P1.1, LABEL
Complement bit, for example, CPL P3.0
Increment, for example, INC P2
Decrement, for example, DEC P2
Decrement and jump if not zero, for example,
DJNZ P3, LABEL
Move Carry to Bit Y of Port X
Clear Bit Y of Port X
Set Bit Y of Port X
LATCH
D
CL
Q
Q
ALTERNATE
ALTERNATE
FUNCTION
FUNCTION
OUTPUT
INPUT
DV
DD
INTERNAL
PULL-UP
P3.x
PIN