LAN91C111I-NS SMSC, LAN91C111I-NS Datasheet - Page 101

• Manufacturer Part Number: LAN91C111I-NS
• Description: IC ETHERNET CTLR MAC PHY 128-QFP
• Manufacturer: SMSC
• Type: Single Chip MAC and PHYr

Specifications of LAN91C111I-NS

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 140 mA
• Maximum Operating Temperature: + 85 C
• Ethernet Connection Type: 100BASE-T or 100BASE-T4 or 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1014

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111 REV C
ISA BUS
SIGNAL
nIOWR
IOCHRDY
RESET
A0
nSBHE
IRQn
D0-D15
nIOCS16
UNUSED PINS
GND
VCC
Table 12.2 High-End ISA or Non-Burst EISA Machines Signal Connectors (continued)
LAN91C111
SIGNAL
nWR
ARDY
RESET
nBE0
nBE1
INTR0
D0-D15
nLDEV buffered
nADS
nBE2, nBE3,
nCYCLE, W/nR,
nRDYRTN, LCLK
NOTES
I/O Write strobe - asynchronous write access. Address is valid before
leading edge. Data is latched on trailing edge.
This signal is negated on leading nRD, nWR if necessary. It is then
asserted on CLK rising edge after the access condition is satisfied.
16 bit data bus. The bus byte(s) used to access the device are a function
of nBE0 and nBE1:
Not used = tri-state on reads, ignored on writes
nLDEV is a totem pole output. Must be buffered using an open collector
driver. nLDEV is active on valid decodes of A15-A4 and AEN=0.
No upper word access.
nBE0
DATASHEET
0
0
1
101
nBE1
0
1
0
D0-D7
Not used
Lower
Lower
Revision 1.91 (06-01-09)
D8-D15
Upper
Not used
Upper