LAN91C111I-NS SMSC, LAN91C111I-NS Datasheet - Page 60

• Manufacturer Part Number: LAN91C111I-NS
• Description: IC ETHERNET CTLR MAC PHY 128-QFP
• Manufacturer: SMSC
• Type: Single Chip MAC and PHYr

Specifications of LAN91C111I-NS

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 140 mA
• Maximum Operating Temperature: + 85 C
• Ethernet Connection Type: 100BASE-T or 100BASE-T4 or 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1014

Revision 1.91 (06-01-09)
8.18
FAILED
BYTE
BYTE
HIGH
LOW
1
Bank 2 - FIFO Ports Register
This register is updated upon an ALLOCATE MEMORY MMU command.
FAILED - A zero indicates a successful allocation completion. If the allocation fails the bit is set and
only cleared when the pending allocation is satisfied. Defaults high upon reset and reset MMU
command. For polling purposes, the ALLOC_INT in the Interrupt Status Register should be used
because it is synchronized to the read operation. Sequence:
1. Allocate Command
2. Poll ALLOC_INT bit until set
3. Read Allocation Result Register
ALLOCATED PACKET NUMBER - Packet number associated with the last memory allocation request.
The value is only valid if the FAILED bit is clear.
Note: For software compatibility with future versions, the value read from the ARR after an allocation
This register provides access to the read ports of the Receive FIFO and the Transmit completion FIFO.
The packet numbers to be processed by the interrupt service routines are read from this register.
REMPTY - No receive packets queued in the RX FIFO. For polling purposes, uses the RCV_INT bit
in the Interrupt Status Register.
TOP OF RX FIFO PACKET NUMBER - Packet number presently at the output of the RX FIFO. Only
valid if REMPTY is clear. The packet is removed from the RX FIFO using MMU Commands 3) or 4).
REMPTY
TEMPTY
Reserved
1
1
OFFSET
OFFSET
0
request is intended to be written into the PNR as is, without masking higher bits (provided
FAILED = 0).
3
4
Reserved
Reserved
0
0
FIFO PORTS REGISTER
ALLOCATION RESULT
0
REGISTER
NAME
NAME
0
0
DATASHEET
0
ALLOCATED PACKET NUMBER
60
0
0
RX FIFO PACKET NUMBER
TX FIFO PACKET NUMBER
READ ONLY
0
READ ONLY
TYPE
TYPE
0
0
10/100 Non-PCI Ethernet Single Chip MAC + PHY
0
0
0
SYMBOL
SYMBOL
FIFO
ARR
SMSC LAN91C111 REV C
0
0
0
Datasheet
0
0
0