LAN91C111I-NS SMSC, LAN91C111I-NS Datasheet - Page 19

• Manufacturer Part Number: LAN91C111I-NS
• Description: IC ETHERNET CTLR MAC PHY 128-QFP
• Manufacturer: SMSC
• Type: Single Chip MAC and PHYr

Specifications of LAN91C111I-NS

• Controller Type: Ethernet Controller, MAC/PHY
• Interface: Serial EEPROM
• Voltage - Supply: 3.3V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 128-QFP
• Product: Ethernet Controllers
• Number Of Transceivers: 1
• Standard Supported: IEEE 802.3 or IEEE 802.3u
• Data Rate: 10 Mbps or 100 Mbps
• Supply Voltage (max): 5 V
• Supply Voltage (min): 0 V
• Supply Current (max): 140 mA
• Maximum Operating Temperature: + 85 C
• Ethernet Connection Type: 100BASE-T or 100BASE-T4 or 100BASE-TX or 10BASE-T
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 638-1014

10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
Chapter 6 Signal Description Parameters
SMSC LAN91C111 REV C
6.1
O4
O12
O16
O24
OD16
OD24
I/O4
I/O24
I/OD
I
IS
Iclk
I/O
O/I
**
Buffer Types
This section provides a detailed description of each SMSC LAN91C111 signal. The signals are
arranged in functional groups according to their associated function.
The ‘n’ symbol at the beginning of a signal name indicates that it is an active low signal. When ‘n’ is
not present before the signal name, it indicates an active high signal.
The term “assert” or “assertion” indicates that a signal is active; independent of whether that level is
represented by a high or low voltage. The term negates or negation indicates that a signal is inactive.
The term High-Z means tri-stated.
The term Undefined means the signal could be high, low, tri-stated, or in some in-between level.
DC levels and conditions defined in the DC Electrical Characteristics section.
Bidirectional buffer with 2mA source and 4mA sink
Bidirectional Open drain buffer with 4mA sink
Output buffer with 2mA source and 4mA sink
Output buffer with 6mA source and 12mA sink
Output buffer with 8mA source and 16mA sink
Output buffer with 12mA source and 24mA sink
Open drain buffer with 16mA sink
Open drain buffer with 24mA sink
Bidirectional buffer with 12mA source and 24mA sink
Input buffer
Input buffer with Schmitt Trigger Hysteresis
Clock input buffer
Differential Input
Differential Output
5V tolerant. Input pins are able to accept 5V signals
DATASHEET
19
Revision 1.91 (06-01-09)